40GbE TCP Off-loading Engine(TOE40G-IP) IP core is the epochal solution implemented without CPU. Generally, TCP processing is so complicated that expensive high-end CPU
is required. TOE40G-IP built by pure hardwired logic can take place of
such extra CPU for TCP protocol management. This IP product includes reference
design for Intel FPGA. It helps you to reduce development time.
DesignGateway provide demo file for Intel FPGA boards. You can evaluate TOE40G-IP core on real board before purchasing.
|TOE40G-IP core Presentation||1.0E|
|Document Name||Intel PAC||Arria 10 GX|
|TOE40G-IP core Datasheet||Rev1.0|
|Reference Design Document||Rev1.0||Rev1.0|
|Demo Instruction Document||Rev1.0||Rev1.0|
|Evaluation file & Apps for PC
|Intel PAC||Arria 10 GX|
|Large scale Blade Server||NAS||SDN (Software Defined Network)||Video Editing System|