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The Expert of IP Core & Embedded

UDP10G-IP coreUDP/IP stack implementation by all hardware logic, without CPU

UDP10G-IP

UDP10G IP core is the epochal solution implemented without CPU. This IP core is suitable for network application. This IP product includes reference design for Intel® FPGA. It helps you to reduce development time.
DesignGateway provide demo file for Intel® FPGA boards. You can evaluate UDP10G-IP core on real board before purchasing.


Features

  • All hardware logic to achieve CPU-less system
  • Support IPv4 protocol
  • Support one port connection
  • Transmit/Receive buffer size, programmable on HDL for optimized resource
  • Simple data interface by standard FIFO interface
  • Simple control interface by standard register interface
  • One clock domain interface by fixed 125 MHz clock frequency
  • Multicast/broadcast Tx feature customization
  • Super low-latency DG 10G EMAC-IP for UDP10G-IP core (Option) Learn more
  • Provide free evaluation sof file for FPGA Development Kits (1 hour time limited)
  • Reference design is included in IP core product


Block diagram




Document & Demo bit file download

Common Documents

Document name Revision
UDP10G-IP core Presentation 1.1E
DG EMAC-IP Presentation Rev1.0

Document Name Arria® 10 SX/GX Cyclone® 10 GX
UDP10G-IP core Datasheet Rev1.1
Reference Design Document Rev1.3
Demo Instruction Document Rev1.3
Evaluation sof file & Apps for PC Get Password Arria® 10 SX
Arria® 10 GX
Demo Video
10GEMAC-IP for UDP10G-IP Datasheet Rev1.0
Loopback Reference Design Document Rev1.0
Loopback Demo Instruction Document Rev1.0
Evaluation sof file & Apps for PC Get Password Cyclone® 10 GX

Super low-latency DG 10GbE MAC core for UDP10G-IP

DG 10GbE MAC core implements the MAC layer for UDP10G-IP core and fully compatible with Intel MAC. It has many advantages.

  • Super low-latency, Tx=19.2nsec, Rx=44.8nsec.
  • Minimized resource usage, ½ of Intel MAC core.
  • Very low price, 1/5 of Intel MAC core.

DG 10GEMAC-IP Intel 10GEMAC
Tx latency (clk freq.=156.25MHz) 19.2ns (3clk) 76.8ns (12clk)
Rx latency (clk freq.=156.25MHz) 44.8ns (7clk) 83.2ns (13clk)
ALMs 1362 1617
Registers 1259 3015
Block Memory 0 2320

Free sof file for evaluation

DesignGateway provide 1-hour limitation sof file for Intel® FPGA Development Boards. You can evaluate UDP10G-IP core on real board before purchasing.


Alliance Partner


Design Gateway Co., Ltd.

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