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The Expert of IP Core & Embedded

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Technical & Marketing Document Updates

NVMe-IP ┃SATA-IP┃TOE-IP┃UDP-IP┃AS-IP

IP core Brochure

Intel Gigabit IP core series Brochure Rev2.6EA 2020.10
Xilinx Gigabit IP core series Brochure Rev2.6EX 2020.10

NVMeG4-IP

Xilinx NVMe-IP core series Presentation Rev2.3 - Updated 2020.12
Xilinx NVMeG4 IP Datasheet Rev1.3 - Updated 2020.12
Xilinx NVMeG4 IP Demo Instruction Document Rev1.2 - Updated 2020.12
Xilinx NVMeG4 IP Reference Design Document Rev1.1 - Updated 2020.12
Xilinx NVMeG4 IP 2ch RAID0 Reference Design Document Rev1.0 - New 2020.5
Xilinx NVMeG4 IP 2ch RAID0 Demo Instruction Document Rev1.0 - New 2020.5

NVMeG3-IP

Common NVMe IP Demo Instruction Document Rev4.3 - Updated 2021.6
Intel NVMeG3-IP / NVMe-IP Presentation Rev2.2 - Updated 2021.6
Intel NVMe IP demo FPGA board Setup Rev4.2 - Updated 2021.6
Intel NVMeG3 IP Datasheet Rev1.1 - Updated 2020.10
Intel NVMeG3 IP Reference Design Document Rev1.0 - New 2020.4
Intel NVMeG3 IP Demo Instruction Document Rev1.0 - New 2020.4
Intel NVMeG3-IP / NVMe-IP Presentation Rev2.0 2020.4
Xilinx NVMeG3 IP Reference Design Document Rev1.1 - Updated 2021.6
Xilinx NVMe-IP core series Presentation Rev2.3 - Updated 2020.12
Xilinx NVMeG3 IP Datasheet Rev1.3 - Updated 2020.12
Xilinx NVMeG3 IP Demo Instruction Document Rev2.0 - Updated 2020.12
Xilinx NVMeG3 IP 4ch RAID0 Demo Instruction Document Rev1.1 - Updated 2020.4
Xilinx NVMeG3 IP 2ch RAID0 Reference Design Document Rev1.0 - New 2020.3
Xilinx NVMeG3 IP 2ch RAID0 Demo Instruction Document Rev1.0 - New 2020.3
Xilinx NVMeG3 IP 4ch RAID0 Reference Design Document Rev1.0 - New 2020.3

raNVMe-IP

Common raNVMe IP Demo Instruction Document Rev1.2 - Updated 2021.1
Common raNVMe IP Data Stream Demo Instruction Document Rev1.1 - Updated 2021.1
Common raNVMe IP Multi-User Demo Instruction Document Rev1.0 - New 2021.1
Intel raNVMe IP Reference Design Document Rev1.0 - New 2020.10
Intel raNVMe IP Datasheet Rev1.0 - New 2020.8
Intel raNVMe-IP Presentation Rev1.0AE - New 2020.8
Xilinx raNVMe IP Datasheet Rev1.2 - Updated 2021.1
Xilinx raNVMe IP Reference Design Document Rev1.2 - Updated 2021.1
Xilinx raNVMe IP Data Stream Demo Reference Design Document Rev1.1 - Updated 2021.1
Xilinx raNVMe IP Multi-User Demo Reference Design Document Rev1.0 - New 2021.1
Xilinx raNVMe IP Reference Design Document Rev1.1 - Updated 2020.10
Xilinx raNVMe-IP Presentation Rev1.0XE - New 2020.8

NVMe-IP

Common NVMe IP (Gen4) 4ch RAID0 Demo Instruction Document Rev1.0 - New 2021.6
Common NVMe IP Demo Instruction Document Rev4.3 - Updated 2021.6
Common NVMe IP exFAT Demo Instruction Document Rev2.0 - Updated 2020.7
Common FTP Server Demo Instruction Document Rev2.0 - Updated 2020.7
Common NVMe IP 2ch RAID0 Demo Instruction Document Rev2.0 - Updated 2020.6
Intel NVMe IP 4ch RAID0 Reference Design Document for Agilex Rev1.0 - New 2021.6
Intel 4ch RAID0 demo FPGA board Setup Rev1.0 - New 2021.6
Intel NVMeG3-IP / NVMe-IP Presentation Rev2.2 - Updated 2021.6
Intel NVMe IP for Agilex Datasheet Rev1.0 - New 2021.6
Intel NVMe IP for Agilex Reference Design Document Rev1.0 - New 2021.6
Intel NVMe IP Demo Instruction Document for Agilex Rev1.0 - New 2021.6
Intel NVMe IP demo FPGA board Setup Rev4.2 - Updated 2021.6
Intel NVMe IP exFAT Datasheet Rev1.3 - Updated 2020.12
Intel NVMe IP Datasheet Rev3.4 - Updated 2020.10
Intel PCIe Switch NVMe IP Datasheet Rev1.2 - Updated 2020.10
Intel NVMe IP for Stratix 10 Datasheet Rev1.0 - New 2020.10
Intel NVMe IP for Stratix 10 Reference Design Document Rev1.0 - New 2020.10
Intel NVMe IP demo FPGA board Setup Rev4.1 - Updated 2020.10
Intel NVMe IP exFAT Demo Instruction Document Rev1.3 - Updated 2020.4
Intel NVMe IP Reference Design Document Rev3.3 - Updated 2020.3
Intel PCIe Switch NVMe IP Reference Design Document Rev1.1 - Updated 2020.2
Intel PCIe Switch NVMe IP Demo Instruction Document Rev1.1 - Updated 2020.2
Xilinx NVMe IP 2ch RAID0 Reference Design Document Rev1.4 - Updated 2021.7
Xilinx NVMe IP DDR Reference Design Document Rev1.2 - Updated 2021.7
Xilinx NVMe IP Reference Design Document Rev3.7 - Updated 2021.6
Xilinx NVMe IP 2ch RAID0 Demo Instruction Document Rev2.1 - Updated 2021.3
Xilinx NVMe IP DDR Demo Instruction Document Rev1.1 - Updated 2021.3
Xilinx NVMe-IP core series Presentation Rev2.3 - Updated 2020.12
Xilinx NVMe IP exFAT Datasheet Rev1.5 - Updated 2020.12
Xilinx NVMe IP demo FPGA board Setup Rev4.2 - Updated 2020.12
Xilinx NVMe IP Datasheet Rev3.7 - Updated 2020.10
Xilinx PCIe Switch NVMe IP Datasheet Rev1.2 - Updated 2020.10
Xilinx FTP 25G Server Demo Reference Design Document Rev1.0 - New 2020.10
Xilinx FTP 25G Server demo Instruction Document Rev1.0 - New 2020.10
Xilinx FTP 25G Server demo FPGA board Setup Rev1.0 - New 2020.10
Xilinx NVMe IP exFAT Reference Design Document Rev1.4 - Updated 2020.7
Xilinx FTP 10G Server Demo Reference Design Document Rev1.1 - Updated 2020.7
Xilinx FTP 10G Server demo FPGA board Setup Rev2.0 - New 2020.7
Xilinx NVMe IP 2ch RAID0 demo FPGA board Setup Rev2.0 - New 2020.6
Xilinx NVMe IP 4ch RAID0 Demo Instruction Document Rev1.1 - Updated 2020.4
Xilinx NVMe IP PCIe SW Demo Instruction Document Rev1.2 - Updated 2020.4
Xilinx PCIe Switch NVMe IP Reference Design Document Rev1.1 - Updated 2020.2
Xilinx PCIe Switch NVMe IP Demo Instruction Document Rev1.1 - Updated 2020.2

SATA-IP

Intel FTP Server Demo Reference Design Document Rev1.0 - New 2020.2
Intel FTP Server Demo Instruction Rev1.0 - New 2020.2
Xilinx SATA IP Datasheet Rev2.4 - Updated 2021.6
Xilinx SATA IP Device Reference Design Document for AC701 Rev1.0 - New 2021.6
Xilinx SATA IP Device Demo Instruction Document for AC701 Rev1.1 - Updated 2021.6

TOE100G-IP

Common TOE100G IP Demo Instruction Document Rev1.0 - New 2021.2
Intel TOE100G IP Datasheet Rev1.0 - New 2021.4
Intel TOE100G IP Reference Design Document Rev1.0 - New 2021.4
Intel TOE100G IP demo FPGA board Setup Rev1.0 - New 2021.4
Xilinx TOE100G IP Datasheet Rev1.1 - Updated 2021.4
Xilinx TOE100G IP demo FPGA board Setup Rev1.1 - Updated 2021.4
Xilinx TOE100G IP Reference Design Document Rev1.0 - New 2021.2

TOE40G-IP

Intel TOE40G IP Datasheet Rev1.1 - Updated 2020.10
Xilinx TOE40G IP Datasheet Rev1.2 - Updated 2020.10
Xilinx TOE40G IP Demo Instruction Document Rev1.2 - Updated 2020.3

TOE25G-IP

Common TOE25G IP Demo Instruction Document Rev1.1 - Updated 2020.9
Intel TOE25G IP demo FPGA board Setup Rev2.0 - Updated 2021.7
Intel TOE25G IP Datasheet Rev1.1 - New 2021.3
Intel TOE25G IP Reference Design Document Rev1.0 - New 2020.9
Xilinx TOE/UDP25G IP demo FPGA board Setup Rev2.0 - Updated 2021.6
Xilinx FTP 25G Server Demo Reference Design Document Rev1.0 - New 2020.10
Xilinx FTP 25G Server demo Instruction Document Rev1.0 - New 2020.10
Xilinx FTP 25G Server demo FPGA board Setup Rev1.0 - New 2020.10
Xilinx TOE25G IP Datasheet Rev1.2 - Updated 2020.9
Xilinx TOE25G IP Reference Design Document Rev1.2 - Updated 2020.9

TOE10G-IP

Common TOE10G IP Demo Instruction Document Rev2.1 - Updated 2020.8
Common FTP Server Demo Instruction Document Rev2.0 - Updated 2020.7
Intel TOE10G IP Datasheet Rev1.7 - Updated 2021.3
Intel TOE/UDP10G IP demo FPGA board Setup Rev3.1 - New 2021.3
Intel Presentation Rev1.2 - Updated 2021.2
Xilinx TOE10G IP Datasheet Rev1.14 - Updated 2021.4
Xilinx Presentation Rev1.3 - Updated 2021.2
Xilinx TOE10G IP Reference Design Document Rev1.4 - Updated 2020.8
Xilinx TOE/UDP10G IP demo FPGA board Setup Rev3.0 - New 2020.8
Xilinx 10GEMAC-IP Datasheet Rev1.1 - Updated 2020.7
Xilinx FTP Server Demo Reference Design Document Rev1.1 - Updated 2020.7
Xilinx FTP Server demo FPGA board Setup Rev2.0 - New 2020.7

EMAC-IP

Intel 10G EMAC IP Datasheet Rev1.1 - Updated 2020.10
Xilinx 10G25G EMAC IP Datasheet Rev1.3 - Updated 2020.8

TOE1G-IP

Common TOE1G IP CPU Demo Instruction Document Rev2.0 - Updated 2020.7
Intel TOE/UDP1G IP demo FPGA board Setup Rev2.0 - New 2021.2
Intel TOE1G IP Datasheet Rev2.10 - Updated 2020.10
Intel TOE1G IP Reference Design Document Rev1.1 - Updated 2020.3
Intel FTP Server Demo Reference Design Document Rev1.0 - New 2020.2
Intel FTP Server Demo Instruction Document Rev1.0 - New 2020.2
Intel 2 port Demo Reference Design Document Rev1.0 - New 2019.12
Intel 2 port Demo Instruction Document Rev1.0 - New 2019.12
Xilinx TOE&UDP1G IP demo FPGA board Setup Rev3.0 - Updated 2020.11
Xilinx TOE1G IP Datasheet Rev2.9 - Updated 2020.10
Xilinx TOE1G IP Reference Design Document Rev1.1 - Updated 2020.7

UDPxxG-IP series

Intel UDPxxG IP Presentation Rev1.1AE - Updated 2021.6
Xilinx UDPxxG IP Presentation Rev1.1XE - Updated 2021.6

UDP40G-IP

Intel UDP40G-IP Datasheet Rev1.1 - Updated 2020.10
Xilinx UDP40G-IP Datasheet Rev1.1 - Updated 2020.10

UDP25G-IP

共 通 UDP25G IP CPU Demo Instruction Document Rev1.0 - New 2021.6
Intel UDP25G IP Reference Design Document Rev1.0 - New 2021.7
Intel UDP25G-IP Datasheet Rev1.0 - New 2021.6
Intel TOE/UDP25G IP demo FPGA board Setup Rev2.0 - Updated 2021.6
Xilinx UDP25G-IP Datasheet Rev1.0 - New 2021.6
Xilinx UDP25G IP Reference Design Document Rev1.0 - New 2021.6
Xilinx TOE/UDP25G IP demo FPGA board Setup Rev2.0 - Updated 2021.6

UDP10G-IP

Common UDP10G IP CPU Demo Instruction Document Rev2.0 - Updated 2020.8
Intel UDP10G-IP Datasheet Rev1.2 - Updated 2020.10
Xilinx UDP10G-IP Datasheet Rev1.4 - Updated 2020.10
Xilinx UDP10G IP Reference Design Document Rev1.3 - Updated 2020.8

UDP1G-IP

Common UDP1G IP CPU Demo Instruction Document Rev2.0 - Updated 2020.11
Intel UDP1G IP Datasheet Rev1.5 - Updated 2021.3
Intel TOE/UDP1G IP demo FPGA board Setup Rev2.0 - New 2021.2
Intel UDP1G IP Reference Design Document Rev1.2 - Updated 2020.3
Xilinx TOE&UDP1G IP demo FPGA board Setup Rev3.0 - Updated 2020.11
Xilinx UDP1G-IP Datasheet Rev1.2 - Updated 2020.10

Low Latency Networking IP

Common LL UDP10GRx IP Demo Instruction Document Rev1.1 - Updated 2021.4
Common TOE10GLL IP Demo Instruction Document Rev1.0 - New 2020.11
Intel TOE10GLL IP Reference Design Document Rev1.1 - Updated 2021.5
Intel TOE10GLL IP Datasheet 1.1 - Updated 2021.4
Intel LL UDP10GRx IP Datasheet 1.0 - New 2021.4
Intel LL UDP10GRx IP Reference Design Document Rev1.0 - New 2021.4
Intel LL UDP10GRx IP demo FPGA board Setup Rev1.0 - New 2021.4
Intel LL10GEMAC IP Datasheet 1.0 - New 2021.3
Intel LL10GEMAC IP Reference Design Document Rev1.0 - New 2021.3
Intel LL10GEMAC IP Demo Instruction Document Rev1.0 - New 2021.3
Intel LL10GEMAC IP demo FPGA board Setup Rev1.0 - New 2021.3
Intel Presentation Rev1.0 - New 2020.4
Xilinx TOE10GLL IP Reference Design Document Rev1.1 - Updated 2021.5
Xilinx TOE10GLL IP Datasheet 1.1 - Updated 2021.4
Xilinx LL10GEMAC IP Datasheet 1.1 - Updated 2021.4
Xilinx LL10GEMAC IP Demo Instruction Document Rev1.1 - Updated 2021.4
Xilinx LL10GEMAC IP demo FPGA board Setup Rev1.0 - New 2021.4
Xilinx LL UDP10GRx IP Datasheet 1.1 - Updated 2021.4
Xilinx LL UDP10GRx IP Reference Design Document Rev1.1 - Updated 2021.4
Xilinx LL UDP10GRx IP demo FPGA board Setup Rev1.0 - New 2020.6
Xilinx LL10GEMAC IP Reference Design Document Rev1.0 - New 2020.5
Xilinx Presentation Rev1.0 - New 2020.4

tCAM-IP

Intel tCAM IP Datasheet 1.02 - Updated 2021.3
Intel tCAM IP Search Replace Demo Reference Design Document 1.02 - Updated 2021.3
Intel tCAM IP Search Replace Demo Instruction Document 1.00 - New 2021.1
Intel Presentation Rev1.0 - New 2020.11
Intel tCAM IP Reference Design Document Rev1.00 - New 2020.8

SHA256-IP

Intel SHA256 IP Datasheet 1.00 - New 2021.1
Intel SHA256 IP Demo Instruction Document 1.00 - New 2021.1

AES128-IP

Intel AES128 IP Datasheet 1.00 - New 2021.4
Intel AES128 IP Reference Design Document Rev1.00 - New 2021.4
Intel AES128 IP Demo Instruction Document 1.00 - New 2021.5

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