Technical & Marketing Document Updates
NVMe-IP ┃SATA-IP┃TOE-IP┃UDP-IP┃AS-IP
IP core Brochure
| Intel | Gigabit IP core series Brochure Rev2.3EA | 2018.5 |
| Xilinx | Gigabit IP core series Brochure Rev2.3EX | 2018.5 |
NVMeG4-IP
| Xilinx | NVMeG4 IP Datasheet Rev1.1 - Updated | 2020.5 |
| Xilinx | NVMeG4 IP 2ch RAID0 Reference Design Document Rev1.0 - New | 2020.5 |
| Xilinx | NVMeG4 IP 2ch RAID0 Demo Instruction Document Rev1.0 - New | 2020.5 |
| Xilinx | NVMeG4 IP Demo Instruction Document Rev1.1 - Updated | 2020.4 |
| Xilinx | NVMeG4 IP Reference Design Document Rev1.0 - New | 2020.1 |
| Xilinx | NVMeG4-IP / NVMe-IP Presentation Rev2.1 | 2020.1 |
NVMeG3-IP
| Intel | NVMeG3 IP Datasheet Rev1.0 - New | 2020.4 |
| Intel | NVMeG3 IP Reference Design Document Rev1.0 - New | 2020.4 |
| Intel | NVMeG3 IP Demo Instruction Document Rev1.0 - New | 2020.4 |
| Intel | NVMeG3-IP / NVMe-IP Presentation Rev2.0 | 2020.4 |
| Xilinx | NVMeG3 IP Datasheet Rev1.1 - Updated | 2020.5 |
| Xilinx | NVMeG3 IP Demo Instruction Document Rev1.1 - Updated | 2020.4 |
| Xilinx | NVMeG3 IP 4ch RAID0 Demo Instruction Document Rev1.1 - Updated | 2020.4 |
| Xilinx | NVMeG3 IP 2ch RAID0 Reference Design Document Rev1.0 - New | 2020.3 |
| Xilinx | NVMeG3 IP 2ch RAID0 Demo Instruction Document Rev1.0 - New | 2020.3 |
| Xilinx | NVMeG3 IP 4ch RAID0 Reference Design Document Rev1.0 - New | 2020.3 |
raNVMe-IP
| Common | raNVMe IP Demo Instruction Document Rev1.0 - New | 2020.8 |
| Intel | raNVMe IP Datasheet Rev1.0 - New | 2020.8 |
| Intel | raNVMe-IP Presentation Rev1.0AE - New | 2020.8 |
| Xilinx | raNVMe IP Datasheet Rev1.1 - New | 2020.8 |
| Xilinx | raNVMe IP Reference Design Document Rev1.0 - New | 2020.8 |
| Xilinx | raNVMe-IP Presentation Rev1.0XE - New | 2020.8 |
NVMe-IP
SATA-IP
| Intel | FTP Server Demo Reference Design Document Rev1.0 - New | 2020.2 |
| Intel | FTP Server Demo Instruction Rev1.0 - New | 2020.2 |
TOE40G-IP
| Xilinx | TOE40G IP Demo Instruction Document Rev1.2 - Updated | 2020.3 |
TOE25G-IP
| Common | TOE25G IP Demo Instruction Document Rev1.1 - Updated | 2020.9 |
| Intel | TOE25G IP Datasheet Rev1.0 - New | 2020.9 |
| Intel | TOE25G IP Reference Design Document Rev1.0 - New | 2020.9 |
| Intel | TOE25G IP demo FPGA board Setup Rev1.0 - New | 2020.9 |
| Xilinx | TOE25G IP Datasheet Rev1.2 - Updated | 2020.9 |
| Xilinx | TOE25G IP Reference Design Document Rev1.2 - Updated | 2020.9 |
| Xilinx | TOE25G IP demo FPGA board Setup Rev1.1 - Updated | 2020.9 |
TOE10G-IP
| Common | TOE10G IP Demo Instruction Document Rev2.1 - Updated | 2020.8 |
| Common | FTP Server Demo Instruction Document Rev2.0 - Updated | 2020.7 |
| Intel | TOE10G IP Datasheet Rev1.5 - Updated | 2020.8 |
| Intel | TOE/UDP10G IP demo FPGA board Setup Rev3.0 - New | 2020.8 |
| Xilinx | TOE10G IP Datasheet Rev1.12 - Updated | 2020.8 |
| Xilinx | TOE10G IP Reference Design Document Rev1.4 - Updated | 2020.8 |
| Xilinx | TOE/UDP10G IP demo FPGA board Setup Rev3.0 - New | 2020.8 |
| Xilinx | 10GEMAC-IP Datasheet Rev1.1 - Updated | 2020.7 |
| Xilinx | FTP Server Demo Reference Design Document Rev1.1 - Updated | 2020.7 |
| Xilinx | FTP Server demo FPGA board Setup Rev2.0 - New | 2020.7 |
10G25G EMAC-IP
| Xilinx | 10G25G EMAC IP Datasheet Rev1.3 - Updated | 2020.8 |
TOE1G-IP
| Common | TOE1G IP CPU Demo Instruction Document Rev2.0 - Updated | 2020.7 |
| Xilinx | TOE1G IP Datasheet Rev2.8 - Updated | 2020.7 |
| Xilinx | TOE1G IP Reference Design Document Rev1.1 - Updated | 2020.7 |
| Xilinx | TOE1G IP demo FPGA board Setup Rev2.0 - New | 2020.7 |
| Intel | TOE1G IP Datasheet Rev2.9 - Updated | 2020.3 |
| Intel | TOE1G IP Reference Design Document Rev1.1 - Updated | 2020.3 |
| Intel | FTP Server Demo Reference Design Document Rev1.0 - New | 2020.2 |
| Intel | FTP Server Demo Instruction Document Rev1.0 - New | 2020.2 |
| Intel | 2 port Demo Reference Design Document Rev1.0 - New | 2019.12 |
| Intel | 2 port Demo Instruction Document Rev1.0 - New | 2019.12 |
UDPxxG-IP (common)
| Intel | UDPxxG IP Presentation Rev1.0AE - New | 2019.12 |
| Xilinx | UDPxxG IP Presentation Rev1.0XE - New | 2019.12 |
UDP10G-IP
| Common | UDP10G IP CPU Demo Instruction Document Rev2.0 - Updated | 2020.8 |
| Xilinx | UDP10G-IP Datasheet Rev1.3 - Updated | 2020.8 |
| Xilinx | UDP10G IP Reference Design Document Rev1.3 - Updated | 2020.8 |
UDP1G-IP
| Intel | UDP1G IP Datasheet Rev1.3 - Updated | 2020.3 |
| Intel | UDP1G IP Reference Design Document Rev1.2 - Updated | 2020.3 |
| Intel | UDP1G IP Demo Instruction Document Rev1.3 - Updated | 2020.3 |
Low Latency Networking IP
| Intel | Presentation Rev1.0 - New | 2020.4 |
| Xilinx | LL UDP10GRx IP Datasheet 1.0 - New | 2020.6 |
| Xilinx | LL UDP10GRx IP Reference Design Document Rev1.0 - New | 2020.6 |
| Xilinx | LL UDP10GRx IP Demo Instruction Document Rev1.0 - New | 2020.6 |
| Xilinx | LL10GEMAC IP Datasheet 1.0 - New | 2020.5 |
| Xilinx | LL10GEMAC IP Reference Design Document Rev1.0 - New | 2020.5 |
| Xilinx | LL10GEMAC IP Demo Instruction Document Rev1.0 - New | 2020.5 |
| Xilinx | Presentation Rev1.0 - New | 2020.4 |
tCAM-IP
| Intel | tCAM IP Datasheet 1.01 - Updated | 2020.8 |
| Intel | tCAM IP Reference Design Document Rev1.00 - New | 2020.8 |
| Intel | tCAM IP Demo Instruction Document 1.01 - Updated | 2020.8 |
| Intel | tCAM IP Search Replace Demo Instruction Document 1.00 - New | 2020.8 |
| Jan | Feb | Mar | Apr | May | Jun | Jul | Aug | Sep | Oct | Nov | Dec | 1 year |
Alliance Partner
Design Gateway Co., Ltd.
Head Office
3-23-17 Naka-cho, Koganei, Tokyo, JAPAN
R&D
89/13 Amornpan 205 Tower1, 11th floor, Ratchadapisek7 (Nathong) Alley, Ratchadapisek Road, Din Daeng, Bangkok, 10400 THAILAND