{"id":920,"date":"2022-12-09T11:41:12","date_gmt":"2022-12-09T04:41:12","guid":{"rendered":"https:\/\/dgway.com\/blog_E\/?p=920"},"modified":"2022-12-09T12:47:48","modified_gmt":"2022-12-09T05:47:48","slug":"md5-computation-accelerator","status":"publish","type":"post","link":"https:\/\/dgway.com\/blog_E\/2022\/12\/09\/md5-computation-accelerator\/","title":{"rendered":"MD5 Computation Accelerator"},"content":{"rendered":"
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MD5 Computation Accelerator
https:\/\/github.com\/dg-hpcdev\/alveo-simple-examples\/tree\/main\/01_md5\/<\/a><\/figcaption><\/figure>\n<\/div>\n\n\n

This is a simple example demonstrating how to use FPGA hardware accerleration by writing C++ codes. This example is only intended to show how to write simple algorithms in C++ and them in FPGA without much consideration for performance. Thus, the md5 implementation in this example will be very straight forward and similar to how one might normally implement md5 algorithm in software. This example consists of two C++ source files: md5.cpp<\/code> and host.cpp<\/code>.<\/p>\n\n\n\n

    \n
  • md5.cpp<\/code> is the kernel code for computing md5 hash. This is a very straightforward implementation without optimization for hardware.<\/li>\n\n\n\n
  • host.cpp<\/code> is the code running on the host PC and is responsible for controlling and communicating with the FPGA.<\/li>\n\n\n\n
  • md5.cfg<\/code> is a configuration file that describe, among other things, what kernels will be instantiated and connectivity among them.<\/li>\n<\/ul>\n\n\n\n

    Setup<\/h2>\n\n\n\n

    This must be done everytime a new terminal is opened<\/p>\n\n\n\n

    source \/opt\/xilinx\/xrt\/setup.sh\nsource <Vitis install path>\/Vitis\/<version>\/settings64.sh\nexport PLATFORM_REPO_PATHS=\/opt\/xilinx\/platforms\nexport PLATFORM=xilinx_u250_gen3x16_xdma_4_1_202210_1<\/code><\/pre>\n\n\n\n
    For software emulation:<\/p>\n\n\n\n
    export XCL_EMULATION_MODE=sw_emu\ncd sw_emu<\/code><\/pre>\n\n\n\n
    For hardware emulation:<\/p>\n\n\n\n
    export XCL_EMULATION_MODE=hw_emu\ncd hw_emu<\/code><\/pre>\n\n\n\n
    For hardware:<\/p>\n\n\n\n
    cd hw<\/code><\/pre>\n\n\n\n
    Build Host Software<\/h2>\n\n\n\n
    g++ -Wall -g -std=c++11 ..\/src\/host.cpp -o md5 -I${XILINX_XRT}\/include\/ -L${XILINX_XRT}\/lib\/ -lOpenCL -pthread -lrt -lstdc++<\/code><\/pre>\n\n\n\n
    Build And Link Kenel<\/h2>\n\n\n\n
    # Replace ${TARGET} with \/ Set TARGET to:\n#  sw_emu if targeting software emulation\n#  hw_emu if targeting hardware emulation\n#  hw if targeting hardware\nv++ -c -t ${TARGET} --platform ${PLATFORM} --config ..\/src\/md5.cfg -k md5 -I..\/src ..\/src\/md5.cpp -o md5.xo\nv++ -l -t ${TARGET} --platform ${PLATFORM} --config ..\/src\/md5.cfg .\/md5.xo -o md5.xclbin<\/code><\/pre>\n\n\n\n
    Configure Emulator<\/h2>\n\n\n\n
    Only when targeting software\/hardware emulation<\/p>\n\n\n\n
    emconfigutil --platform ${PLATFORM} --nd 1<\/code><\/pre>\n\n\n\n
    Run the host software<\/h2>\n\n\n\n
    # Replace <file_to_hash> with path to file to be hashed\n.\/md5 md5.xclbin <file_to_hash><\/code><\/pre>\n","protected":false},"excerpt":{"rendered":"
    This is a simple example demonstrating how to use FPGA hardware accerleration by writing C++ codes. This example is only intended to show how to write simple algorithms in C++ and them in FPGA without much consideration for performance. Thus, the md5 implementation in this example will be very straight forward and similar to how one might normally implement md5...<\/p>\n","protected":false},"author":1,"featured_media":931,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[18],"tags":[],"class_list":["post-920","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-hls-development-series"],"_links":{"self":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts\/920","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/comments?post=920"}],"version-history":[{"count":4,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts\/920\/revisions"}],"predecessor-version":[{"id":946,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts\/920\/revisions\/946"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/media\/931"}],"wp:attachment":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/media?parent=920"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/categories?post=920"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/tags?post=920"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}