{"id":922,"date":"2022-12-09T12:07:07","date_gmt":"2022-12-09T05:07:07","guid":{"rendered":"https:\/\/dgway.com\/blog_E\/?p=922"},"modified":"2022-12-09T12:48:57","modified_gmt":"2022-12-09T05:48:57","slug":"2d-perlin-noise-generator-accelerator","status":"publish","type":"post","link":"https:\/\/dgway.com\/blog_E\/2022\/12\/09\/2d-perlin-noise-generator-accelerator\/","title":{"rendered":"2D Perlin Noise Generator Accelerator"},"content":{"rendered":"
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2D Perlin Noise Generator Accelerator
https:\/\/github.com\/dg-hpcdev\/alveo-simple-examples\/tree\/main\/02_perlin<\/a><\/figcaption><\/figure>\n<\/div>\n\n\n

This is simple example that generate 2D perlin noise in FPGA and write the values to a file as python style lists. The main aim of this example is to introduce the DATAFLOW pragma which enable task level parallelism. However, the main purpose of using DATAFLOW pragma is to show how writing HLS C++ code for hardware generally requires a diffrent style of programming.<\/p>\n\n\n\n

void perlin(int nx, int ny, float* result, const float freq)\n{\n#pragma HLS INTERFACE m_axi port=result\n#pragma HLS DATAFLOW\n    \n    hls::stream<Coord> coord_stream;\n    hls::stream<float> noise_stream;\n\n    const int N = nx*ny;\n\n    gen_coord(coord_stream, nx, ny, freq);\n    perlin_calc(coord_stream, noise_stream, N);\n    write_mem(noise_stream, result, N);\n}<\/code><\/pre>\n\n\n\n
In the code snippet above, it might seem like gen_coord<\/code> is executed and then perlin_calc<\/code> and write_mem<\/code> respectively. In real hardware, those three functions are actually executed concurrently with data streams (coord_stream<\/code> and noise_stream<\/code>) connecting them. The data ‘flows’ between those 3 tasks, thus the name DATAFLOW.<\/p>\n\n\n\n
    \n
  • gen_coord<\/code> generate x and y coordiate and write them to coord_stream<\/code> one by one.<\/li>\n\n\n\n
  • perlin_calc<\/code> reads coordinates from coord_stream<\/code> and writes generated noise values to noise_stream<\/code>.<\/li>\n\n\n\n
  • write_mem<\/code> reads noise values from noise_stream<\/code> and writes them to memory.<\/li>\n<\/ul>\n\n\n\n
    For more complex dataflows, the flow must be carefully designed to prevent any potential deadlocks.<\/p>\n\n\n\n
    Setup<\/h2>\n\n\n\n
    This must be done everytime a new terminal is opened<\/p>\n\n\n\n
    source \/opt\/xilinx\/xrt\/setup.sh\n# Replace <Vitis install path> and <vesion>\nsource <Vitis install path>\/Vitis\/<version>\/settings64.sh\nexport PLATFORM_REPO_PATHS=\/opt\/xilinx\/platforms\n# Change to appropiate platform\nexport PLATFORM=xilinx_u250_gen3x16_xdma_4_1_202210_1<\/code><\/pre>\n\n\n\n
    For software emulation:<\/p>\n\n\n\n
    export XCL_EMULATION_MODE=sw_emu\ncd sw_emu<\/code><\/pre>\n\n\n\n
    For hardware emulation:<\/p>\n\n\n\n
    export XCL_EMULATION_MODE=hw_emu\ncd hw_emu<\/code><\/pre>\n\n\n\n
    For hardware:<\/p>\n\n\n\n
    cd hw<\/code><\/pre>\n\n\n\n
    Build Host Software<\/h2>\n\n\n\n
    g++ -Wall -g -std=c++11 ..\/src\/host.cpp -o perlin -I${XILINX_XRT}\/include\/ -L${XILINX_XRT}\/lib\/ -lOpenCL -pthread -lrt -lstdc++<\/code><\/pre>\n\n\n\n
    Build And Link Kenel<\/h2>\n\n\n\n
    # Replace ${TARGET} with \/ Set TARGET to:\n#  sw_emu if targeting software emulation\n#  hw_emu if targeting hardware emulation\n#  hw if targeting hardware\nv++ -c -t ${TARGET} --platform ${PLATFORM} --config ..\/src\/perlin.cfg -k perlin -I..\/src ..\/src\/perlin.cpp -o perlin.xo\nv++ -l -t ${TARGET} --platform ${PLATFORM} --config ..\/src\/perlin.cfg .\/perlin.xo -o perlin.xclbin<\/code><\/pre>\n\n\n\n
    Configure Emulator<\/h2>\n\n\n\n
    Only when targeting software\/hardware emulation<\/p>\n\n\n\n
    emconfigutil --platform ${PLATFORM} --nd 1<\/code><\/pre>\n\n\n\n
    Run the host software<\/h2>\n\n\n\n
    # Replace <W> with width, <H> with height, and <freq> with frequency\n.\/perlin perlin.xclbin <W> <H> <freq><\/code><\/pre>\n\n\n\n
    After running, a text file perlin_hls.txt<\/code> will be generated and contains lists of generated noise value.<\/p>\n","protected":false},"excerpt":{"rendered":"
    This is simple example that generate 2D perlin noise in FPGA and write the values to a file as python style lists. The main aim of this example is to introduce the DATAFLOW pragma which enable task level parallelism. However, the main purpose of using DATAFLOW pragma is to show how writing HLS C++ code for hardware generally requires a...<\/p>\n","protected":false},"author":1,"featured_media":932,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[18],"tags":[],"class_list":["post-922","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-hls-development-series"],"_links":{"self":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts\/922","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/comments?post=922"}],"version-history":[{"count":5,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts\/922\/revisions"}],"predecessor-version":[{"id":947,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/posts\/922\/revisions\/947"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/media\/932"}],"wp:attachment":[{"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/media?parent=922"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/categories?post=922"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/dgway.com\/blog_E\/wp-json\/wp\/v2\/tags?post=922"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}