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1 Introduction
2 Hardware overview
2.1 10 Gb BASE-R PHY
2.2 10G Ethernet MAC
2.3 MACRegCtrl
2.4 UDP10G IP
2.5 Timer
2.5.1 MacTxTimer
2.5.2 PhyTimer
2.5.3 MacRxTimer
2.5.4 TrnTimer
2.6 CPU and Peripherals
2.6.1 AsyncAvlReg
2.6.2 UserReg
3 CPU Firmware Sequence
3.1 Show parameters
3.2 Reset IP
3.3 Run Loopback test
3.4 Function list in User application
4 Revision History
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UDP10G IP loopback reference design