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1 Introduction 2 Hardware Overview 2.1 MemBus2Reg Module 2.2 AsyncBusReg 2.3 UserReg 2.3.1 Key setting 2.3.2 Parameter setting 2.3.3 Encryption/Decryption/Bypass 3 CPU Firmware 3.1 Set encryption/decryption key 3.2 Set encryption/decryption IV 3.3 Show Data Memory 3.4 Fill AAD Memory 3.5 Fill Plain Data Memory 3.6 Encrypt Data 3.7 Decrypt Data 3.8 Bypass Data 3.9 Clone Memory 3.10 Loop verification 4 Revision History Return to Top

AES256GCM10G25G-IP Reference Design