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1. Environment Setup
2. FPGA development board setup
3. Nios II Command Shell
4. Command detail and testing result
4.1 KeyIn Setting
4.2 IvIn Setting
4.3 Show Data Memory
4.4 Fill AAD Memory
4.5 Fill DataIn Memory
4.6 Encrypt Data
4.7 Decrypt Data
4.8 Bypass Data
4.9 Clone Memory
4.10 Loop verification
5. Revision History
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AES256GCM 10G25G IP Demo Instruction