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1 System Overview
2 Hardware
2.1 LAxi2TOE
2.1.1 AsyncAxiReg
2.1.2 UserRegTOE
2.2 IPFilter
2.3 PktCombined
2.4 AXI DMA Controller
2.5 LAxi2EMAC
2.6 TOE10GLL-IP
2.7 AMD 10G/25G Ethernet Subsystem.
3 Kernel Space
3.1 DG 10GEMAC driver
3.2 DG TOE driver
4 User Space
4.1 DG socket
4.1.1 Socket Creation and Management
4.1.2 Socket Information and Control
4.1.3 Environment Configuration
4.1.4 Connection Management
4.1.5 Data Transfer Operations
4.1.6 File Stream Operations
4.2 TCP C testing program.
4.2.1 Compilation and Usage
4.2.2 Throughput Testing Method
4.2.3 Data Verification Testing Method
5 Revision History
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DG socket with TCP/IP accelerator Reference Design