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1 Introduction
2 Hardware
2.1 Ethernet Subsystem.
2.1.1 DG LL10GEMAC-IP
2.1.2 AMD 10G/25G Ethernet Subsystem.
2.2 TOE10GLL-IP
2.3 QDMA-IP (Optional)
2.4 CPU and Peripherals
2.4.1 AsyncAxiReg
2.4.2 UserReg
2.5 Timer
3 CPU Firmware (FPGA)
3.1 Display Parameters
3.2 Reset Parameters
3.3 Send Data Test
3.4 Receive Data Test
3.5 Full Duplex Test
3.6 Function List in CPU Firmware
4 Test Software (PC)
4.1 tcpdatatest Application (Half Duplex Test)
4.2 tcp_client_txrx_xg Application (Full Duplex Test)
5 Revision History
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TOE10GLL-IP (Cut-Through) Reference Design Manual