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1 Introduction
2 Hardware overview
2.1 TestGen
2.2 NVMe
2.2.1 NVMe-IP
2.2.2 Integrated Block for PCIe
2.2.3 Dual port RAM.
2.3 DdrCtrl
2.3.1 AxiMtWr
2.3.2 AxiMtRd
2.4 CPU and Peripherals
2.4.1 AsyncCtrl
2.4.2 AsyncAxiReg
2.4.3 UserReg
3 CPU Firmware
3.1 Test firmware (nvmeddrtestc)
3.1.1 Identify command
3.1.2 Write/Read command
3.1.3 SMART Command
3.1.4 Flush Command
3.1.5 Shutdown Command
3.2 Function list in Test firmware
4 Example Test Result
5 Revision History
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NVMe-IP DDR reference design manual