FPGA set up for NVMeTCP10G-IP

Rev1.1 5-Jul-23

1       Introduction.. 2

2       FPGA setup. 7

3       PC setup. 9

3.1       Serial console. 9

3.2       FPGA configuration. 11

4       Revision History. 15

 


 

1       Introduction

 

This document describes how to setup FPGA board and test environment for running NVMeTCP10G-IP demo. The user can setup the test environment for accessing target NVMe SSD on Test PC across 10Gb Ethernet as shown in Figure 1‑1.

 

Figure 11 Test environment for running the demo

 

FPGA board runs NVMeTCP10G-IP for the host operation while Test PC integrates 10Gb Ethernet card and one NVMe SSD to be NVMe/TCP target. Test PC installs LinuxOS with the kernel version 5.0 or later to support NVMe/TCP protocol. Also, Serial console is run on Test PC to be user interface console.


 

Before running the test, please prepare following test environment.

i)     Install Linux kernel version 5.0 or later,

ii)    Plug in with one NVMe SSD

iii)   Plug in with 10 Gigabit Ethernet card

 

Note: Example hardware for running the demo is listed as follows.

[1] 10G Network Adapter: Intel X710-DA2

https://ark.intel.com/content/www/us/en/ark/products/83964/intel-ethernet-converged-network-adapter-x710da2.html

[2] 10-Gigabit SFP+ AOC cable (AOC-S1S1-001)

https://www.10gtek.com/10gsfp+aoc

[3] PC: Motherboard ASUS Z170-K, 64 GB RAM, and LinuxOS with kernel version 5.4.0-81

[4] Target NVMe SSD in PC: 512 GB Samsung 960 Pro


 

Figure 12 NVMeTCP10G-IP demo on ZCU106


 

Figure 13 NVMeTCP10G-IP demo on ZCU102

 


 

Figure 14 NVMeTCP10G-IP demo on KCU105


 

2       FPGA setup

 

This topic describes the details to set up FPGA board for running the demo.

 

1)    Check DIPSW and jumper setting on FPGA board.

a)    Board setting on ZCU102/ZCU106 board is shown in Figure 2‑1.

-       Set SW6=all ONs to use USB-JTAG

-       Only ZCU102, insert jumper to J16 to enable Tx SFP+

Figure 21 ZCU102/ZCU106 board setting

 

b)    Board setting on KCU105 board is shown in Figure 2‑2. Insert jumper to J6 to enable Tx SFP+.

Figure 22 Insert jumper to enable SFP+ on KCU105


 

2)    Connect micro USB cable from FPGA board to PC for JTAG programming.

3)    Connect micro USB cable from FPGA board to PC for USB UART.

4)    Connect power supply to FPGA development board.

5)    Connect 10Gb Ethernet cable between FPGA board and PC by inserting 10 Gb SFP+ AOC. Some boards have many SFP connectors, use the channel as shown in Figure 2‑3.

 

Figure 23 SFP+ channel using on ZCU106/KCU105 board

 

6)    Power on FPGA board.


 

3       PC setup

 

The step describes Serial console setting and FPGA programmer tools on PC for running the demo. Both Windows OS and Linux OS are displayed.

 

3.1      Serial console

 

When connecting FPGA board to PC, many COM ports from FPGA connection are detected and displayed. Please select the correct COM port for running the demo.

 

Serial console setting: Baud rate=115,200, Data=8-bit, Non-Parity and Stop = 1-bit.

 

Windows OS

 

Select Standard COM port for KCU105 while select COM port number of Interface0 for ZCU102/ZCU106 board.

 

Figure 31 COM port number for Serial console on Windows OS


 

Linux OS

 

When connecting FPGA board to PC, many USB Serial ports from FPGA connection are detected and displayed, as shown in Figure 3‑2.

 

Use following command to list USB Serial ports.

>> dmesg | grep ttyUSB

 

When running on KCU105, select the second port.

When running on ZCU102/ZCU106, select the first port.

 

Figure 32 Command to scan USB Serial ports on Linux OS

 

Figure 3‑3 shows the example to configure Serial by using Putty application. Serial console setting: Baud rate=115,200, Data=8-bit, Non-Parity and Stop = 1.

 

Figure 33 Serial console setting on Linux OS

 


 

3.2      FPGA configuration

 

This topic shows how to load configuration file and the firmware of the demo to FPGA board. Two methods are applied programming tools when using KCU105 board and script file when using ZCU102 or ZCU106 board.

 

When running KCU105 board, open Vivado tools and program bit file by using Hardware manager, as shown in Figure 3‑4.

 

Figure 34 KCU105 Configuration

 


 

When running ZCU102/ZCU106 board, run script file on TCL shell to load bit file and elf file.

 

Windows OS

 

Script file for loading on Windows OS is bat file. Run the following commands.

>> cd <directory that stores bat file?

>> nvmetcp10giptest_<buffsize>_<boardname>.bat.

 

Figure 35 ZCU102/ZCU106 Configuration on Windows OS


 

Linux OS

 

Script file for loading on Linux OS is tcl file. Run the following commands.

>> cd <directory that stores tcl file>

>> exec xsdb nvmetcp10giptest_<buffsize>_<boardname>.tcl.

 

Figure 36 ZCU102/ZCU106 Configuration on Linux OS

 


 

After finishing FPGA configuration, welcome message is displayed on the console as shown in Figure 3‑7.

 

Figure 37 Welcome screen

 


 

4       Revision History

 

Revision

Date

Description

1.0

3-Nov-21

Initial version release

1.1

24-Mar-22

Correct the information