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1 Introduction 2 Hardware Overview 2.1 AsyncAxiReg 2.2 UserReg 2.3 LL10GEMAC 2.4 Xilinx Transceiver (PMA for 10GBASE-R) 2.5 PMARstCtrl 3 CPU Firmware 3.1 Set FPGA’s IP Address 3.2 Set FPGA’s Port Number 3.3 Set FPGA’s MAC address 3.4 Show key materials 3.5 Set certificate 3.6 Set RSA key information 3.7 Print certificate 3.8 Print RSA key information 3.9 Start server for listen connection 4 Revision History Return to Top

QUIC10GS-IP Reference Design