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Features
Applications
General Description
Functional Description
Command Processor
User I/F and Reg
Main Controller
Data Processor
TxData Mux
RxData Splitter
User Logic
DG SATA-IP
SATA PHY
Core I/O Signals
Timing Diagram.
Initialization
dgIF typeS
Identify Device
Security Erase Unit
Error
Verification Methods
Recommended Design Experience
Ordering Information
Revision History
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SATA HCTL IP Core Data Sheet