1 Introduction 2 Hardware overview 2.1 100Gb Ethernet (MAC) Subsystem (100G BASE-SR) 2.2 TxEMACMux4to1 2.3 TOE100G-IP 2.4 CPU and Peripherals 2.4.1 AsyncAxiReg 2.4.2 UserReg 3 CPU Firmware on FPGA 3.1 Display parameters 3.2 Reset IP 3.3 Half Duplex Test 3.4 Full duplex test 3.5 Function list in User application 4 Test Software on PC 4.1 ?tcpdatatest? for half duplex test 4.2 ?tcp_client_txrx_single? for full duplex test 5 Revision History Return to Top