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Features
Applications
General Description
Functional Description
Control Block
Reg
TCP Stack
Transmit Block
Tx Data Buffer
Tx Packet Buffer
Packet Builder
Receive Block
Rx Buffer
Packet Filtering
Packet Splitter
Rx Data Buffer
User Block
10 Gb Ethernet MAC. 10 10 Gb Ethernet MAC
10 Gb BASE-R PHY. 10 10 Gb BASE-R PHY
Core I/O Signals
Timing Diagram.
IP Initialization
Register Interface
Tx FIFO Interface
Rx FIFO Interface
EMAC Interface
Example usage
Client mode (SRV[0]=?0?)
Server mode (SRV[0]=?1?)
PKL and TDL setting in Send command
TDL = N times of PKL
TDL = N times of PKL + Residue
Verification Methods
Recommended Design Experience
Ordering Information
Revision History
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TOE10G-IP Core Data Sheet