TOE200GADV-IP Core Datasheet

Design Gateway Co., Ltd. April 3, 2026    Product Specification Rev2.01

Features

  • Comprehensive TCP/IP offloading engine
  • IPv4 protocol support without IP fragmentation
  • Capability to handle 4 TCP sessions with the same remote target
  • Jumbo frame support
  • Configurable TCP buffer size: Up to 1 MB
  • User data interface: Utilizes a 1024-bit Avalon stream interface
  • Recommended clock frequency: A minimum of 240 MHz
  • Ethernet MAC interface: Utilizes a 1024-bit Avalon-ST interface with a provided adapter IP core, TOEMACIF, for seamless integration with Altera Agilex 7 F-Tile Ethernet Hard IP
  • Reference design available for using with Agilex 7 I-Series FPGA development Kit
  • Customized options for following features:
    • Additional buffer sizes
    • Specified number of TCP sessions
    • Support for the Ping command
Core Facts
Provided with Core
Documentation Reference design manual
Demo instruction manual
Design File Formats Encrypted File
Instantiation Templates VHDL
Reference Designs & Application Notes Quartus Project,
See Reference design manual
Additional Items Demo on Agilex 7 I-Series development kit
Support
Support Provided by Design Gateway Co., Ltd.
Table 1 — Example Implementation Statistics (TOE200GADV IP)
Family Example Device Session Buffer Size (Tx and Rx) Fmax (MHz) ALMs Registers Pin Block Memory bit Design Tools
Agilex7 I-Series AGIB027R29A1E2VR3 1 64 KB (min) 390.625 14,442 55,184 1,704,960 QuartusII 23.1
1 MB (max) 350 31,271 50,108 17,433,600 QuartusII 23.1
4 64 KB (min) 390.625 41,935 73,195 4,850,688 QuartusII 23.1
1 MB (max) 350 49,220 114,351 67,765,248 QuartusII 23.1

Note: The actual logic resource depends on the percentage of unrelated logic.

Table 2 — Example Implementation Statistics (TOEMAC IF)
Family Example Device Fmax (MHz) ALMs Registers Pin Block Memory bit Design Tools
Agilex7 I-Series AGIB027R29A1E2VR3 402.832 4,041 7,149 1,067,008 QuartusII 23.1

Applications

The TOE200GADV IP core serves as a fully offloading engine designed for TCP/IP packet processing, eliminating the need for CPU and external memory usage. This IP allows for the seamless transmission of TCP/IP packets at the full 200G Ethernet line rate.

Figure 1 - TCP Accelerator System
Figure 1 — TCP Accelerator System

Within the Host system, the host processor takes on the responsibility of selecting four performance-sensitive TCP sessions, handled by the TOE200GADV IP. Concurrently, the host processor processes the remaining Ethernet packets via Host2MAC module to support the remaining TCP sessions and other protocols that do not require high-performance handling. User data processed by TOE200GADV IP is directly transferred to the Host memory by DMA engine, allowing applications running on the host processor to access this data.

In contrast, other Ethernet packets transferred through the Host2MAC module are stored separately within the host memory, awaiting the host processor decoding before they can be utilized by the applications. The incorporation of the TOE200GADV IP core significantly enhances the performance of TCP data transfer within the Network interface application.

Figure 2 - NVMe/TCP Initiator System
Figure 2 — NVMe/TCP Initiator System

The NVMe/TCP protocol facilitates remote access to storage systems equipped with NVMe SSDs through network connectivity. It requires at least two TCP sessions for the distinct transfer of commands and data. The incorporation of the TOE200GADV IP core empowers the system to concurrently handle up to four TCP sessions. Consequently, the Initiator logic can write and read data with two NVMe SSDs installed within the remote target system concurrently. Eliminating the necessity for TCP/IP implementation within the Initiator logic simplifies the logic design, allowing it to be exclusively dedicated to supporting NVMe commands. Using a pure-hardwired logic design optimizes data transfer performance, making it possible to upload high-resolution video data to remote storage in real-time.

General Description

Figure 3 - TOE200GADV IP Block Diagram
Figure 3 — TOE200GADV IP Block Diagram

The TOE200GADV IP core serves as a complete offloading engine designed for processing TCP/IP packets. It provides four distinct user interfaces to facilitate the transfer of TCP payload data across four separate TCP sessions. While most network parameters are uniform across these sessions, the TCP port number can be individually configured for each. Moreover, the size of the TCP buffer, for both transmit and receive directions within each TCP session, can be configured independently to accommodate the specific characteristics of each session. The TOE200GADV IP utilizes a 1024-bit Avalon-ST interface for Ethernet packet transfer to and from the Ethernet MAC via the TOEMACIF module, which functions as the adapter logic.

The TOE200GADV IP's logic can be categorized into three main blocks: Control block, Transmit block, and Receive block. The Control block is connected to the Control I/F of the user interface and is responsible for configuring commands, managing network parameters, and monitoring the operational status of the IP. Within the Control block, the MainCtrl component receives user command requests and stores associated user parameters in Param Regs. After validating the command, MainCtrl generates a command request for the respective TCP engine. The system incorporates four TCP engines, each dedicated to managing the operations of individual TCP sessions.

The Transmit block manages the TCPTx I/F, facilitating the transmission of TCP payload data through a 1024-bit Avalon stream I/F. Data received from the user interface must be re-aligned before being stored in the TxTCP buffer. When a user requests data transmission, the Packet builder retrieves payload data from the TxTCP buffer to construct TCP/IP packets, which are then transferred to TOEMACIF module.

Conversely, the Receive block manages the TCPRx I/F, receiving TCP payload data from the Ethernet Hard IP via a 1024-bit Avalon stream I/F. The operation of the Receive block is reverse of the Transmit block. Received packets undergo validation through Packet Filtering, and the TCP payload data extracted from valid packets is subsequently stored in the RxTCP buffer. When data is available in the RxTCP buffer, and the user is ready to receive it, the RxAligner transfers received data to the user.

Design Gateway also includes the TOEMACIF module as an encrypted file in the TOE200GADV IP core release package. This module serves as an adapter logic, bridging the connection between the Ethernet MAC interface of TOE200GADV IP (1024-bit Avalon-ST I/F) and the user interface of the F-Tile Ethernet Hard IP on Agilex-7 device (512-bit MAC Segmented I/F). Due to the Ethernet Hard IP's operation in a distinct clock domain (MacClk) from the user logic, TOEMACIF incorporates two asynchronous buffers in the Transmit block and Receive block, namely the TxMAC buffer and the RxMAC buffer, to facilitate data streaming across clock domains.

Functional Description

The TOE200GADV IP has two sets of functions: common functions, which are employed for every TCP session, and session-specific functions that operate within each session. The common functions facilitate communication with the remote target device, while the session functions are responsible for managing individual TCP session, as illustrated in Figure 4.

Figure 4 - TOE200GADV IP Functional Diagram
Figure 4 — TOE200GADV IP Functional Diagram

Common States

  1. Reset: When the TOE200GADV IP is powered-on, the default state is Reset. This state is designed to wait for the user to configure network parameters for both the local host and the remote target, including MAC address and IP address. Once all parameters, including the initialization mode (DstMacMode), are set, the user can de-assert RstB to 1b to initiate the target's initialization.
  2. Target Initialization: This state is used to obtain the MAC address of the target and store the user-assigned network parameters in internal registers. There are three modes, determined by DstMacMode, for acquiring the remote target's MAC address: Client (generating ARP request packet), Server (waiting for ARP reply packet), and Fixed-MAC (user-defined value). Once the target's MAC address is successfully obtained, the initialization process is completed, and the TOE200GADV IP is ready to establish a connection with the target.
  3. Target Ready: After successful target initialization, the main function remains in this state until a reset is asserted. In this state, the user can send command request specifying the active session (Session#0–Session#3) and the operation (Open, Close, and Reset) to be performed by the main function. If the operation request is invalid, such as sending a Close request to an inactive session, the main function will reject the request. Valid requests are forwarded to the session-specific function, which returns either a completion or an error status to the main function after executing the operation.
    Additionally, it is important to note that the session's status may also change without any request from the main function if the remote target device sends a request to open, close, or reset the session.

Session States

  1. Session Inactive: Following a reset, each session function enters the Inactive state. In this state, the session function awaits an open session request from the main function (active open) or the remote target device (passive open). Session establishment is initiated upon receiving the open session request.
  2. Create Session: Session creation involves a three-way handshake process using SYN, SYN-ACK, and ACK packets. The first SYN packet can be sent by either the TOE200GADV IP (active open) or the target (passive open). Another device responds with a SYN-ACK packet if it accepts the connection request. Finally, the process is completed when the first device that initiated the SYN packet sends an ACK packet. Once the connection is successfully established, it becomes ready for data transfer, and the session function reports its status upon completing this process.
  3. Session Ready: The TCP protocol facilitates bidirectional data transfer, allowing for the simultaneously transmission and reception of data within the same session. This is achieved by assigning unique sequence and acknowledge numbers for each data transfer direction to indicate the position of transmitted and accepted data.
  4. Send Data: Each session possesses its dedicated data interface, compatible with a 1024-bit Avalon-ST interface, designed for transmitting data to the target. However, TOE200GADV IP permits only one session to transmit packets at a time. Each session includes a TxTCP buffer for storing data transmitted by the user. The sequence number of the transmitted packet is updated after data is sent from the TxTCP buffer to the target. The data is removed from the buffer once the target updates the acknowledge number to confirm the amount of received data. If all data is successfully transmitted, the session state returns to the 'Ready' state. If the session is terminated, the TxTCP buffer is automatically flushed.
  5. Receive Data: Each session includes an RxTCP buffer for storing data received from the remote target. In accordance with the TCP protocol, the available space in the RxTCP buffer corresponds to the value of the received Window size specified in the transmitted packet. Consequently, the target can continuously send data to TOE200GADV IP without waiting for an updated acknowledge number until the amount of unacknowledged data reaches the Window size limit. While receiving data, the sequence number of received packet is monitored to ensure the correctness of the received data sequence. Packet retransmission is triggered if any received data is lost during this process. Once the RxTCP buffer is completely filled with data, the TOE200GADV IP generates a packet to update the acknowledge number, which is then sent back to the target. The RxTCP buffer is automatically cleared during the session establishment process. User can read data from the RxTCP buffer through the 1024-bit Avalon-ST interface for each session individually, so simultaneous data reading from multiple sessions is possible.
  6. Terminate Session: Session can be terminated either by the TOE200GADV IP (active close) or the remote target (passive close). The first packet used to initiate connection termination is the FIN packet. If termination request is accepted by another device, it responds with FIN and ACK packets, which can be transmitted in single or multiple packets. Finally, the initiating device sends an ACK packet to complete the process. Upon the successful termination, the session function transitions back to the Inactive state. The session function provides a status update upon the completion of this termination process.

Control Block

MainCtrl

The main controller, known as MainCtrl, involves the main functions (common block in Figure 4), which were elaborated upon in the preceding section: Reset, Target initialization, and Target Ready. It decodes the user-assigned commands and parameters to determine the subsequent processes.

For instance, it manages distinct sequences for transmitting and receiving packets to accommodate three types of initialization process. It generates various request types for the transmit and receive blocks, facilitating the creation or interpretation of ARP request and ARP reply packets. Once the MAC address of the remote target is acquired, the result is stored in Param Regs for utilization by other submodules.

In scenarios where a user's command cannot be supported under specific conditions, the main controller will reject the command and issue an error status.

Param Regs

The parameters stored at Param Regs can be received from the local user assignment or retrieved from the receive block. The local user-defined parameters include both the local host and the remote target parameters such as the MAC address, the IP address, and the port number. While the decoded parameters from the receive block are the remote target parameters such as the MAC address and the port number which are used in specific conditions.

Furthermore, various configuration parameters, including timeout values, initialization mode, initial Maximum Segment Size (MSS), and threshold values, are also assigned by local user and stored within Param Regs for utilization by the main controller.

TCP Engine

The TCP Engine manages the operations of each individual TCP session, as described in the session-specific functions shown in Figure 4.

The establishment of a connection can be triggered by either of two devices. In active open mode, the TCP engine prompts the transmit block to send SYN and ACK packets while instructing the receive block to validate a SYN-ACK packet. Conversely, for passive open mode, the packet types of the transmit block and the receive block are reverse.

To send data, once the amount of data in the TxTCP buffer reaches a certain threshold, the TCP engine calculates the sequence number for the transmitted packet. It instructs the transmit block to continuously send data until the total amount of transmitted data reaches the designated value, determined from the latest target window size retrieved by the receive block. The TCP engine will pause the transmit module if the window size and acknowledge number from the remote target are not updated. In case of lost transmitted data, which are indicated by the generation of duplicate ACK packets by the target, the TCP Engine will suspend the operation of the transmit block and generate the new parameter sets to initiate data retransmission through the transmit block. TOE200GADV IP provides a status signal indicating the remaining amount of transmitted data yet to be received by the remote target, allowing the local user to monitor the progress of the transmission operation. The send operation is considered completed when there is no remaining transmitted data in the TxTCP buffer.

To receive data, the TCP engine continuously monitors the sequence number of the received packet, retrieved from the receive block. This information is used to calculate the quantity of received data. When the received data reaches a specified threshold, the TCP engine computes the acknowledge number and configures it to the transmit block. This action triggers the sending of a packet, which serves to update the current values of acknowledge number and the window size of the RxTCP buffer. If the sequence number of a received packet is skipped, it indicates a data loss situation. In such cases, the TCP engine instructs the transmit block to generate duplicated ACK packets for the recovery of the missing data.

When operating in receiving data only, the local user can configure how quickly the TCP engine triggers the transmit block for sending an ACK packet. This feature allows tuning of ACK packet frequency, helping to avoid excessive or overly frequent ACK packet submitting that might unnecessarily consume the network bandwidth.

Additionally, the TCP engine offers the local user the flexibility to define a threshold value for generating TCP window update packets. This feature is useful when the user logic stops reading data from the RxTCP buffer until it is full. During this period, the target cannot send more data to this session. However, once the user resumes data reading and the free space within the RxTCP buffer increases to the specified threshold value, the TCP engine instructs the transmit block to send an ACK packet, updating the TCP window size based on the RxTCP buffer's free space. Then, the target can resume data transmission.

The connection termination can be done by either of two devices. In active close mode, the TCP engine prompts the transmit block to send FIN and ACK packets while instructing the receive block to validate FIN and ACK packets. Conversely, for passive close mode, the packet types of the transmit block and the receive block are swapped.

Transmit Block

Tx Aligner

User logic transmits data to TOE200GADV IP using a 1024-bit Avalon-ST interface that is consistently valid for all 1024-bit data, except for the last data beat. This last data beat can be configured to specify the number of unused bytes, indicated by the 'empty' signal. Consequently, TxAligner is responsible for adjusting the alignment of the subsequent transmitted data when the previous one is not aligned. A Tx Aligner module is shared among all four transmitted data interfaces used by the user, so only one interface can transfer data at a time. Since the same Ethernet MAC is shared by four TCP sessions, one user interface provides sufficient data bandwidth to achieve the maximum performance of 200G Ethernet. The realigned data from TxAligner is then stored in one of four TxTCP buffers, depending on the active user number.

TxTCP Buffer

The TxTCP buffer serves as the buffer for transmitted data from the user in each TCP session. The size of this buffer is configurable through the parameter TxBufBitWidth<i>, where i corresponds to the session number (ranging from 0 to 3). A mapping table to show the relationship between TxBufBitWidth and the actual size of TxTCP buffer is provided in Table 3.

Table 3 — TxBufBitWidth and RxBufBitWidth Parameter Description
Configuration Value Buffer Size
964 KB
10128 KB
11256 KB
12512 KB
131 MB

The maximum data payload size of each transmitted packet is constrained by the negotiated MSS value, which is determined during the connection establishment process. If the amount of transmitted data exceeds this limitation, the data must be divided and transmitted across multiple packets. Each segmented payload data for each TCP packet is then sent to the Packet Builder to construct complete TCP packets.

The transmitted data remains stored in the TxTCP buffer until the TCP Engine confirms that the data has been received by the target. Consequently, having a large TxTCP buffer size allows for continuous data transmission to the target without waiting for updated ACK packets from the target for extended periods. If the target finishes processing the received data and issues an ACK packet before the TxTCP buffer reaches its capacity, data transmission can be transferred seamlessly without pauses, enabling the achievement of the maximum data rate of 200G Ethernet. However, it is essential to note that this advantage does come at the cost of significant FPGA memory resources.

Packet Builder

To encapsulate TCP payload data within an Ethernet packet, various layers of header data must be appended, including parameters such as MAC addresses, IP addresses, port numbers, sequence number, acknowledge number, window size, TCP flags, and checksums. This module is responsible for computing the checksums for both the TCP and IP layers and substituting these calculated values into the packet header. Once the header is fully assembled, it is merged with the segmented payload data obtained from the TxTCP buffer before being transmitted to the TOEMACIF.

In addition to creating TCP/IP packets, the packet builder must also support for generating ARP request and ARP reply packets, which may be required during the IP initialization process.

Since the Packet Builder is shared among four TCP sessions, it must be capable of switching the active TCP session after transmitting a packet for one session to handle packets for the remaining sessions once their data is ready for transmission.

Receive Block

RxPac Buffer

TOEMACIF can transmit Ethernet packets to TOE200GADV IP at any time, whereas the TOE200GADV IP requires a short pause time while processing each Ethernet packet. Consequently, the RxPac buffer must be included for storing Ethernet packets when the receiving logics of TOE200GADV IP are not ready to accept new data. In specific scenarios, the RxPac buffer may become full, leading to the incomplete storage of incoming packets. As a result, the interrupt is asserted by TOE200GADV IP at TOEMACRx I/F to signal that the most recent packet has been discarded. However, if TCP engine detects the loss of a packet, it will initiate a data retransmission process to recover the missing packets. Increasing the frequency of the user logic's clock domain (Clk) decreases the likelihood of the RxPac buffer reaching full capacity.

Note: The required clock frequency for user logic (Clk) to ensure lossless packet reception in the RxPac buffer can be approximately estimated as follows:

Assume a 1536-byte TCP payload is received continuously from the Ethernet MAC without any pauses. The TOE200GADV IP requires 13 clock cycles for packet reception and an additional 3 clock cycles for pause time. Meanwhile, the Ethernet MAC transfers data using approximately 12.5 clock cycles. The user logic clock frequency without RxPac buffer overflow should be:

Clk = (13+3)/12.5 × 195.133 MHz = 249.77 MHz

Packet Filtering

This module is responsible for validating incoming packets. To be considered valid, a packet must meet the following criteria:

  1. Network parameters, such as MAC address, IP address, and Port number, must match the local user-defined settings established during initialization.
  2. The packet must either be an ARP packet or a TCP/IPv4 packet without a data fragment flag.
  3. The IP header length must be 20 bytes, and the TCP header length must be within the range of 20 to 60 bytes.
  4. Both the IP checksum and TCP checksum must be correct.
  5. The data pointer, as determined by the sequence number, must be within a valid range.
  6. The acknowledge number must also be within an acceptable range.
  7. Time To Live (TTL) must not be equal to 0.

If a packet meets these validation criteria and contains TCP payload data, the Packet Filtering will extract the TCP payload data and store it in the appropriate RxTCP buffer, determined by the port number value. After the received packet has been fully processed, a signal is generated to notify the TCP Engine to update the current status. In specific scenarios, the TCP Engine may request the Transmit block to generate a packet with updated information, such as acknowledge number and window size, for transmission to the target.

RxTCP Buffer

The RxTCP buffer serves as the buffer for received TCP payload data from the remote target in each TCP session. Its size can be configurable through the parameter RxBufBitWidth<i>, where i corresponds to the session number (ranging from 0 to 3). Table 3 provides a mapping table to show the relationship between RxBufBitWidth and the actual size of RxTCP buffer.

Data received from the target remains stored in the RxTCP buffer until the user reads it via the 1024-bit Avalon-ST I/F. The target continues to transmit TCP payload data until the RxTCP buffer becomes full. Therefore, using a larger RxTCP buffer size increases a chance that the target can continuously send data to the TOE200GADV IP without a pause if the user consistently reads data to free the buffer during operation. As a result, a peak performance can be achieved. Besides, the TCP Engine utilizes the remaining space of RxTCP buffer as the TCP window size in transmitted packets when it needs to update information to the target.

Rx Aligner

The purpose of the Rx Aligner is to transfer and align received data from the RxTCP buffer to the user via the 1024-bit Avalon-ST interface. The 1024-bit data from RxTCP buffer can be directly transmitted to the user logic without requiring alignment for every data beat, except for the last beat, which may contain only a portion of valid bytes. Data that follows unaligned transmission to the user logic must realigned by the Rx Aligner.

TOEMACIF

TxMAC Buffer and RxMAC Buffer

TxMAC and RxMAC buffers are asynchronous buffers integrated into the Transmit and the Receive blocks. They serve to convert the clock domain of data stream between the user clock domain (Clk) and the Ethernet Hard IP clock domain (MacClk).

TxMAC Adapter and RxMAC Adapter

The TxMAC adapter and RxMAC adapter logics are designed to convert data stream format between Avalon-ST interface and MAC Segmented interface. Additional details about the Tx MAC Segmented interface and Rx MAC Segmented interface can be found on the Intel website.

User Logic

As illustrated in Figure 3, the user logic is responsible for managing three distinct user interfaces of the TOE200GADV IP. These interfaces include the Control I/F, utilized for network and system parameter configuration and status monitoring; the TCPTx I/F, designed for data transmission; and the TCPRx I/F, intended for the reception of data streams.

Configuring network and system parameters for the TOE200GADV IP, such as timeout values, can be accomplished by specifying constant values or by utilizing user-defined registers. Furthermore, overseeing the signals responsible for initiating command requests and monitoring operational status can be achieved through a state machine. This approach facilitates the customization of command values and enables real-time tracking of operations, including error detection.

Both the Tx and Rx data interfaces employ a 1024-bit Avalon-ST bus interface. This design choice offers users flexibility, enabling them to map the Data interface of the TOE200GADV IP to other components that are compatible with the Avalon-ST bus.

F-Tile Ethernet Hard IP

The Intel Agilex7 F-Tile Ethernet Hard IP implements both Ethernet MAC and PHY functions and supports various Ethernet data rates. In TOE200GADV IP reference design on the Agilex 7 FPGA I-Series board, the Ethernet Hard IP has been configured with the following parameters:

Core I/O Signals of TOE200GADV IP

Table 4 provides detailed descriptions of configurable parameters, while Table 5 outlines the I/O signals for TOE200GADV IP. The TOEMAC interface matches the 1024-bit Avalon stream standard.

Table 4 — Core Parameters
Name Value Description
NumberSession 1 – 4 Setting the number of TCP sessions
TxBufBitWidth0-3 9 – 13 Setting TxTCP buffer size. Table 3 shows the relation between this value and the actual size.
RxBufBitWidth0-3 9 – 13 Setting RxTCP buffer size. Table 3 shows the relation between this value and the actual size.

Table 5 — User I/O Signals

Signal Name Dir Description
User Control Interface (Common)
RstB In Reset IP core. Active Low. Once RstB changes to 1b, the IP initiates the initialization process.
Note: Before de-asserting RstB to 1b, the values of DstMacMode, SrcMacAddr, DstMacAddrIn (if used), SrcIPAddr, DstIPAddr, WindowThres, MSSInitValSet, TCPCtlTimeOutSet, TCPRxTimeOutSet, and TCPAckDlyTimeSet must be stable. Also, these values must be sustained for 4 clock cycles after the de-assertion of RstB.
Clk In User clock. Recommended to set a clock frequency of at least 250 MHz to minimize the chance of RxPac buffer being overflow.
IPVersion[31:0] Out Represents the IP version number.
TestPin[63:0] Out Reserved to be the IP test point.
DstMacMode[1:0] In Defines the options for obtaining the MAC address of the target.
00bClient mode. IP generates an ARP request packet during initialization; remote target MAC address is extracted from received ARP reply packet.
01bServer mode. IP awaits an incoming ARP request packet; remote target MAC address is extracted from that request.
1XbFixed-MAC mode. User specifies target MAC address via DstMacAddrIn.
Note: When local host and remote target are on different networks, Fixed-MAC mode must be used. Set DstMacAddrIn to the gateway's MAC address.
SrcMacAddr[47:0] In Defines the local host MAC address.
DstMacAddrIn[47:0] In Defines the remote target MAC address, used in Fixed-MAC mode.
DstMacAddrOut[47:0] Out Displays the remote target MAC address. Valid after InitFinish set to 1b (IP initialization is completed).
SrcIPAddr[31:0] In Defines the local host IP address.
DstIPAddr[31:0] In Defines the remote target IP address.
WindowThres[9:0] In Defines the threshold value, measured in 1KB units, to determine when the 'TCP Window Update' packet is sent to the target. Valid range: 0 to 1023. Default value is 0 (feature disabled). Recommended to configure to one-fourth of the RxTCP buffer size.
MSSInitValSet[13:0] In Define initial Maximum Segment Size (MSS) in byte unit for TCP communication, with a configurable range from 536 to 8960. Applied for all TCP sessions during connection establishment to negotiate the final MSS with the target device.
TCPCtlTimeOutSet[31:0] In Defines timeout value, ranging from 1 to FFFF_FFFFh. Timer operates in sync with Clk signal (4 ns for 250 MHz). Counts while awaiting returned packets from target during each operation. Typically set to 1 second or larger.
TCPRxTimeOutSet[23:0] In Similar to TCPCtlTimeOutSet. Range: 1 to FF_FFFFh. Timer counts when the RxTCP buffer holds the last unaligned data (not 1024 bits). Upon timeout, TOE200GADV IP flushes the last data to the user via TCPRx I/F with TCPRxEOP<i> asserted.
User Control Interface (Session)
TCPAckDlyTimeSet[9:0] In Defines the ACK delay timeout value. Range: 1 to 1023. Same timeout value applied for all TCP sessions. Counts when TCP Engine realizes there is new received data. Upon timeout, transmit block is triggered to send ACK packet back to target. Typically set to 128 cycles or larger.
InitFinish Out Represents the completion status of IP initialization process. Set to 0b when IP is reset; changes to 1b once initialization is completed.
TCPConnCmd[3:0] In Defines the command value corresponding to the requested session.
[1:0] – Command: 00b=Active open, 01b=Passive open, 10b=Active close, 11b=Reset
[3:2] – Session number: 00b=Session#0, 01b=Session#1, 10b=Session#2, 11b=Session#3
TCPSrcPort[15:0] In Defines the local host port number.
TCPDstPort[15:0] In Defines the remote target port number. Not used if operating Passive open.
TCPLastMode[1:0] In Configures the last transmission mode.
00b – Duplicated data. IP sends last packet twice; target recognizes second as retransmission and responds with ACK.
1Xb – PSH flag. IP sets PSH flag in TCP header of last packet; target immediately forwards data to application layer.
01b – Normal packet (no PSH or Duplicated packet).
TCPConnReq In Sets to 1b for a single clock cycle to initiate a command request when TCPConnReady=1b. During this time, TCPConnCmd must contain valid data.
TCPConnReady Out Sets to 1b when the IP is ready to accept the new command. Once TCPConnReq is set to 1b, this signal is de-asserted to 0b for 2 clock cycles.
TCPConnCpl Out Sets to 1b for a single clock cycle to signal the completion of a command operation. Status conveyed through TCPConnCplStatus.
TCPConnCplStatus[4:0] Out Represents the command completion status. Bits[3:0] align with TCPConnCmd. Bit[4]=Completion status (0b=Fail, 1b=Success).
TCPConnOn[3:0] Out Represents the active status of individual TCP sessions. Bit[0],[1],[2],[3] = Session#0,#1,#2,#3. 0b=No connection, 1b=Connection established.
TCPConnStatus[255:0] Out Represents the status decoded by the TCP engine for individual TCP sessions. 64-bit structure per session: [63:0]=Session#0, [127:64]=Session#1, [191:128]=Session#2, [255:192]=Session#3.
Bits [3:0] – Current State: 0000b=No connection, 0001b=Active open processing, 0010b=Connection listening, 0011b=Passive open processing, 0100b=Connection ready, 0101b=Queuing Active close, 0110b=Active close processing, 0111b=Passive close processing, 1000b=Unusual condition.
Bit [4] – Packet transmission status.
Bits [52:16] – Target information (valid after connection established): [31:16]=Target port, [47:32]=Negotiated MSS, [51:48]=Window scaling factor, [52]=Window scaling enable flag.
TCPRtrInt Out Retry interrupt signal triggered when the IP detects lost packets and initiates packet retransmission. Set to 1b for a single clock cycle.
TCPRtrIntStatus[79:0] Out Retry interrupt status. Bits[15:0]=Common, Bits[31:16]=Session#0, [47:32]=Session#1, [63:48]=Session#2, [79:64]=Session#3.
Common [0]: ARP reply timeout (Client mode).
Session#0 [16]: SYN-ACK timeout (active open). [17]: ACK timeout (passive open). [19]: ACK timeout (passive close). [20]: Lost ACK / duplicate ACK during data transmission. [21]: Window size timeout. [22]: Lost received data. [23]: Reverse packet detection.
TCPRstInt Out Reset interrupt signal triggered when the IP detects an unrecoverable issue requiring connection termination. Set to 1b for a single clock cycle.
TCPRstIntStatus[79:0] Out Reset interrupt status. Same structure as TCPRtrIntStatus. Session#0: [16]=RST after 15th retry SYN-ACK. [17]=RST after 15th retry passive open. [18]=RST on FIN-ACK timeout (active close). [19]=RST after 15th retry passive close. [20]=RST after 15th retry data ACK. [21]=RST after 15th retry window update. [24]=RST packet received from target. [25]=RST on unsupported packet reception.
User Tx Data Interface — (Use <i> as the session index, ranging from 0 to 3)
TOETxReady<i> Out Asserted to 1b to indicate that the TOETxData<i> has been accepted. Only one of the four signals can be set to 1b at a time.
TOETxData<i>[1023:0] In Transmitted data sent to the IP through session#i. Valid when TOETxValid<i>=1b.
TOETxValid<i> In Asserts to 1b to transmit the TOETxData<i> to the IP.
TOETXSOP<i> In Asserts to 1b to indicate first data. This signal is unused for this IP.
TOETxEOP<i> In Asserts to 1b to indicate last data. Valid when TOETxValid<i>=1b. Once set, IP will transfer all remaining data in TxTCP buffer to the target. Last data is transferred following TCPLastMode configuration.
TOETxEmpty<i>[6:0] In Indicates the number of unused bytes at this transfer cycle. Set to zero during data transfer, except for the last data. At last transfer cycle, can be set to any value to specify unused bytes. E.g., 000_0011b indicates 3 unused bytes; only bit[999:0] of TOETxData<i> is valid.
TOETxStat<i>[31:0] Out Status signal of User Tx Data interface.
[19:0] – Amount of data in TxTCP buffer (byte unit). Resets to 0 after target accepts all data or connection terminated.
[30] – Set to 1b during connection termination execution. During termination, TOETxReady<i> is set to 0b.
[31] – Set to 1b briefly to flush TxTCP buffer after connection terminated.
User Rx Data Interface — (Use <i> as the session index, ranging from 0 to 3)
TOERxReady<i> In Asserts to 1b when the TOERxData<i> has been accepted.
TOERxData<i>[1023:0] Out Received data. Valid when TOERxValid<i>=1b.
TOERxValid<i> Out Asserted to 1b to transmit the TOERxData<i>.
TOERxSOP<i> Out Asserted to 1b to signify that this is the first data.
TOERxEOP<i> Out Asserted to 1b to indicate that this is the last data. At this point, the user should check the amount of unused data by reading TOERxEmpty<i>. Valid when TOERxValid<i>=1b.
TOERxEmpty<i>[6:0] Out Represents the number of unused bytes in the current transfer cycle. Typically set to zero for each cycle, except the last cycle. E.g., 111_1111b (127 unused bytes) means only bits[7:0] of TOERxData<i> is valid.
TOERxStat<i>[31:0] Out Status signal of User Rx Data interface.
[19:0] – Amount of data in RxTCP buffer (byte unit). Resets to 0 after user reads all data or new connection established.
[31] – Set to 1b briefly to flush RxTCP buffer after new connection established.
TOEMACIF Tx Interface
TOEMACTxReady In Asserts to 1b when the TOEMACTxData has been accepted.
TOEMACTxData[1023:0] Out Transmitted data to the TOEMACIF module. Valid when TOEMACTxValid=1b.
TOEMACTxValid Out Asserted to 1b to transmit the TOEMACTxData.
TOEMACTxSOP Out Asserted to 1b to indicate that this is the first data.
TOEMACTxEOP Out Asserted to 1b to indicate that this is the last data. Some data bytes may be unused; monitor using TOEMACTxEmpty.
TOEMACTxEmpty[6:0] Out Represents the number of unused bytes during this cycle. Typically set to all zeros except for the last data strobe.
TOEMACIF Rx Interface
TOEMACRxData[1023:0] In Received data from the TOEMACIF module. Valid when TOEMACRxValid=1b.
TOEMACRxValid In Asserts to 1b to transfer the TOEMACRxData.
TOEMACRXSOP In Asserts to 1b to indicate first data. This signal is unused for this IP.
TOEMACRxEOP In Asserts to 1b to indicate that this is the last data.
TOEMACRxEmpty[6:0] In Indicates the number of unused bytes during this cycle. Typically set to all zeros except for the last data strobe.
TOEMACRxError In Asserts to 1b to indicate that this frame contains FCS error. Valid when the last data is transferred (TOEMACRxEOP=1b).
TOEMACRxInt Out Asserted to 1b for a single clock cycle when the RxPac buffer becomes full and the latest received packet is dropped.

Core I/O Signals of TOEMACIF

Table 6 and Table 7 provide the I/O signals of TOEMACIF for interfacing with TOE200GADV IP and Ethernet MAC, respectively. The Ethernet MAC interface is designed using 512-bit Segmented Avalon-ST interface.

Table 6 — User I/O Signals (Synchronous to Clk)
Signal Name Dir Description
System Signals
Clk In User clock, sourced from the same clock source as the TOE200GADV IP.
TOEMAC Tx Interface
TOEMACTxReady Out Asserted to 1b when the TOEMACTxData has been accepted.
TOEMACTxData[1023:0] In Transmitted data. Valid when TOEMACTxValid=1b.
TOEMACTxValid In Asserts to 1b to initiate the transmission. Must remain at 1b throughout the entire packet transmission process. De-asserting before transmitting the last data is not permissible.
TOEMACTxSOP In Asserts to 1b to indicate that this is the first data. This signal is unused.
TOEMACTxEOP In Asserts to 1b to indicate that this is the last data.
TOEMACTxEmpty[6:0] In Indicates the number of unused bytes during this cycle. Typically set to all zeros except for the last data strobe.
TOEMAC Rx Interface
TOEMACRxData[1023:0] Out Received data from Ethernet MAC. Valid when TOEMACRxValid=1b.
TOEMACRxValid Out Asserted to 1b to transfer the TOEMACRxData.
TOEMACRxSOP Out Asserted to 1b to indicate that this is the first data.
TOEMACRxEOP Out Asserted to 1b to indicate that this is the last data.
TOEMACRxEmpty[6:0] Out Represents the number of unused bytes during this cycle.
TOEMACRxError Out Asserted to 1b to indicate that this frame contains an FCS error. Valid when TOEMACRxEOP=1b.
Table 7 — EMAC I/O Signals (Synchronous to MacClk)
Signal Name Dir Description
Ethernet System Signals
MacRstB In Reset IP core. Active Low. De-assert this signal after Ethernet MAC is ready for packet transfer.
MacClk In Ethernet clock, sourced from the same clock source as Ethernet MAC.
Tx MAC Segmented Interface
MACTxReady In Indicates that Ethernet MAC is ready to receive data.
MACTxData[511:0] Out Input data to Ethernet MAC.
MACTxValid Out Asserted to transfer MACTxData. Must follow at a fixed latency relative to MACTxReady; may go low during transmission.
MACTxInFrame[7:0] Out Indicates valid data in each segment for specific rate. Also indicates the SOP and EOP location.
MACTxEOPEmpty[23:0] Out Indicates the number of empty bytes in that segment at the end of the MAC frame.
Rx MAC Segmented Interface
MACRxData[511:0] In Output data from Ethernet MAC.
MACRxValid In Asserted to indicate that the MACRxData is valid on this cycle.
MACRxInFrame[7:0] In Indicates that valid data in each segment. Also indicates the SOP and EOP location.
MACRxEOPEmpty[23:0] In Indicates the number of empty bytes on MACRxData at the end of the frame.
MACRxFCSError[7:0] In Indicates that the currently ending frame has an error. Valid only on EOP segments. High indicates FCS error, malformed, undersized, or oversized and truncated frame.
MACRxError[15:0] In Indicates that the currently ending frame has a decoding error.
MACRxInt Out Asserted to 1b for a single clock cycle where the RxMAC buffer becomes full, causing the most recently received packet to be dropped.

Timing Diagram — IP Initialization

The TOE200GADV IP begins the IP initialization process when the reset signal (RstB) transitions from 0b to 1b. Prior to de-asserting the reset signal, users must configure the following common parameters: DstMacMode, SrcMacAddr, DstMacAddrIn (only applicable in Fixed-MAC mode), SrcIPAddr, DstIPAddr, WindowThres, MSSInitValSet, TCPCtlTimeOutSet, TCPRxTimeOutSet, and TCPAckDlyTimeSet. These common parameters must retain their values for at least 4 clock cycles after the de-assertion of RstB. Once the IP initialization is successfully completed, InitFinish is set to 1b.

The TOE200GADV IP can be initialized using three different modes, determined by DstMacMode.

Client Mode (DstMacMode = 00b)

When the target and the local host are installed within the same network, the MAC address of the target can be obtained through ARP packet exchange. For simple usage, it is recommended to set the initialization mode to Client mode.

Figure 5 - IP Initialization in Client Mode
Figure 5 — IP Initialization in Client Mode
  1. Set the common parameters, including DstMacMode=00b, with asserting RstB to 1b. The IP initiates initialization in Client mode, loading all common parameters into internal registers. After setting RstB to 1b, user must maintain all inputs for 4 clock cycles. Subsequently, these parameters can be modified as needed.
  2. Utilize the MAC address and IP address to construct an ARP request packet, which will be transmitted to the target.
  3. Upon detecting an ARP request packet, the target generates an ARP reply packet to return its MAC address.
  4. Once the ARP reply packet has been received, the remote target's MAC address is extracted and loaded into the internal registers. The IP sets InitFinish to 1b, signifying the completion of IP initialization. DstMacAddrOut reflects the remote target's MAC address.

Server Mode (DstMacMode = 01b)

Server mode is suitable for applications that employ both the TOE200GADV IPs as the local host and the remote target installing in the same network. If the first device is initialized in Client mode, the subsequent device must be configured to Server mode.

Figure 6 - IP Initialization in Server Mode
Figure 6 — IP Initialization in Server Mode

Fixed-MAC Mode (DstMacMode[1] = 1b)

The Fixed-MAC mode is utilized when the local host and the remote target are installed in different networks. In this mode, the MAC address for the remote target is configured by the gateway's MAC address, assigned by DstMacAddrIn.

Figure 7 - IP Initialization in Fixed-MAC Mode
Figure 7 — IP Initialization in Fixed-MAC Mode

Timing Diagram — Connection Establishment

After completing the IP initialization, users can issue a command request to establish a connection for data transfer. The IP offers two options: active open and passive open. The TOE200GADV IP has the capacity to manage up to four TCP sessions.

Active Open / Client Mode (TCPConnCmd[1:0] = 00b)

Figure 8 - Active Open Command on Session#0
Figure 8 — Active Open Command on Session#0
  1. Configure session parameters, including TCPDstPort, by setting TCPConnReq to 1b for a single clock cycle. The session number is determined by TCPConnCmd[3:2]. Note: Before sending the command request, ensure InitFinish=1b, TCPConnOn[i]=0b, and TCPConnStatus[(64*i)+4]=0b.
  2. The IP validates the inputs and initiates operations. TCPConnReady is set to 0b for 2 clock cycles to pause new command requests.
  3. The IP allows new command requests; TCPConnReady set to 1b. Session#0 state changes from 0000b to 0001b (Active open processing).
  4. A SYN packet for session#0 is sent to the target. If the target accepts, it responds with a SYN-ACK packet. The IP then generates an ACK packet to confirm connection establishment. TCPConnStatus[4] indicates packet transmission busy status.
  5. Upon receiving the SYN-ACK packet, TCPConnOn[0] is set to 1b. Session#0 state transitions to 0100b (Connection ready). Target connection status (MSS, window scaling) available in TCPConnStatus[52:32].
  6. IP signals command completion via TCPConnCpl=1b. Details of completion in TCPConnCplStatus[4:0]: bit[4]=1b (success), bits[3:0]=TCPConnCmd value.

Passive Open / Server Mode (TCPConnCmd[1:0] = 01b)

Figure 9 - Passive Open Command on Session#3
Figure 9 — Passive Open Command on Session#3

Multiple Command Requests

The TOE200GADV IP supports up to four simultaneous TCP sessions, allowing users to issue multiple command requests (one per session) without waiting for previous commands to complete. Please note that the completion order may differ from the submission order of the commands.

Figure 10 - Multiple Command Requests with Non-Sequential Command Completion
Figure 10 — Multiple Command Requests with Non-Sequential Command Completion

Flush Operation of the RxTCP Buffer During Connection Opening

When users initiate an active or passive open command, the RxTCP buffer undergoes a flush operation. The TxTCP buffer is flushed upon connection termination.

Figure 11 - Flush Operation of RxTCP Buffer on Session#0 after Active Open Request
Figure 11 — Flush Operation of RxTCP Buffer on Session#0 after Active Open Request
Figure 12 - Flush Operation of RxTCP Buffer on Session#0 after Passive Open Request
Figure 12 — Flush Operation of RxTCP Buffer on Session#0 after Passive Open Request

Timing Diagram — Connection Termination

Terminating a connection can be initiated by either the TOE200GADV IP (active close) or the remote target (passive close). For an active close command, users specify the session number and configure the TCPConnCmd value. It is recommended to issue an active close command after there is no remaining data stored in the TxTCP buffer.

Active Close (TCPConnCmd[1:0] = 10b)

Figure 13 - Active Close Command on Session#0
Figure 13 — Active Close Command on Session#0
Figure 14 - Active Close on Session#0 During Transmitting Data
Figure 14 — Active Close on Session#0 During Transmitting Data

Passive Close

Figure 15 - Passive Close on Session#1
Figure 15 — Passive Close on Session#1
Figure 16 - Passive Close on Session#1 During Transmitting Data
Figure 16 — Passive Close on Session#1 During Transmitting Data

Session Reset

In cases where unusual events are detected within a specific session, necessitating a reset process, a reset session command is available. This command enables the execution of a reset process for the specific session without interrupting the operation of the remaining sessions.

Figure 17 - Reset Request on Session#0
Figure 17 — Reset Request on Session#0

Timing Diagram — Data Transmission

Data transfer can commence once the connection has been established and is not in the process of termination. The TOE200GADV IP provides four TOETx interfaces utilizing four TCP sessions. The IP accepts only one set of user data for transmission to the Ethernet MAC at a time.

According to TCP/IP specification, the maximum payload size in each Ethernet packet is constrained by the negotiated MSS. The TOE200GADV IP offers two additional features to expedite the ACK packet, configured by TCPLastMode[1:0]: duplicated data mode (00b) and PSH flag mode (1Xb).

Data Transmission Using a Single Connection With Timeout

Figure 18 - Data Transmission Using Session#0 With Timeout
Figure 18 — Data Transmission Using Session#0 With Timeout

Data Transmission With TCPLastMode = 00b (Duplicated Data)

Figure 19 - Data Transmission Using Session#0 Configured by TCPLastMode = 00b
Figure 19 — Data Transmission Using Session#0 Configured by TCPLastMode = 00b

Data Transmission With TCPLastMode[1] = 1b (PSH Flag)

Figure 20 - Data Transmission Using Session#0 Configured by TCPLastMode[1] = 1b
Figure 20 — Data Transmission Using Session#0 Configured by TCPLastMode[1] = 1b

Data Transmission Using Multiple Connections

While there are four user interfaces available, they all share a common TOEMAC Tx interface capable of transmitting only one packet from one session at any given time. The active user interface can switch to the next channels in the sequence 0, 1, 2, 3, 0, ... when the active user pauses transmission or sends the last data packet.

Figure 21 - Data Transmission Using Multiple Sessions
Figure 21 — Data Transmission Using Multiple Sessions

Timing Diagram — Data Reception

The port numbers inside the received packet header are decoded to determine the user interface number (0–3) responsible for transferring the TCP payload data. Each interface transfers data for each session independently, allowing simultaneous data transfer to the user through multiple sessions.

The TCPRx interface includes the EOP flag. The EOP flag can be set to 1b under three conditions: when the last data in the RxTCP buffer aligns with 1024 bits; when the last data is unaligned and reaches a timeout; and when subsequent data follows unaligned data transmission.

Data Reception With 1024-bit Alignment

Figure 22 - Data Reception Using Session#0 With 1024-Bit Alignment
Figure 22 — Data Reception Using Session#0 With 1024-Bit Alignment

Data Reception With 1024-bit Misalignment

When the total amount of received data is not aligned to 1024 bits, the data is initially transferred with 1024-bit alignment. Subsequently, if no additional data is received until the timeout configured by TCPRxTimeOutSet, the last portion of unaligned data is transmitted with the EOP flag set to 1b. If additional data arrives after this point, the first portion of that new data is also unaligned, and its length equals (128 – valid bytes of previous unaligned data).

Figure 23 - Data Reception Using Session#1 With 1024-Bit Misalignment
Figure 23 — Data Reception Using Session#1 With 1024-Bit Misalignment

Data Reception Using Multiple Connections

Figure 24 - Data Reception Using Multiple Sessions
Figure 24 — Data Reception Using Multiple Sessions

Data Reception With TOEMACRxInt Assertion (RxPac Buffer Overflow)

Figure 25 - Data Reception With TOEMACRxInt Assertion Due to Discarded Packet
Figure 25 — Data Reception With TOEMACRxInt Assertion Due to Discarded Packet

Acknowledgement With Delay to Respond the Data Reception

Upon receiving TCP data, the TOE200GADV IP returns an updated acknowledgment number to the target device. Users can configure an ACK delay using the TCPAckDlyTimeSet parameter to reduce unnecessary ACK traffic and improve network efficiency.

Figure 26 - Return ACK Packet to Respond Data Reception
Figure 26 — Return ACK Packet to Respond Data Reception
Figure 27 - Return ACK With Transmission Data to Respond Data Reception
Figure 27 — Return ACK With Transmission Data to Respond Data Reception

Timing Diagram — IP Interrupts

The TOE200GADV IP supports two distinct interrupt types: TCPRtrInt (triggered when error is detected and recovery is feasible) and TCPRstInt (activated when error requires RST packet transmission). These interrupt types are determined using 80-bit status signals divided into five groups (common + four session groups, 16 bits each).

The retry process sets a maximum limit of 15 attempts in most cases. If the lost packet remains unresolved after 15 retry attempts, the interrupt transitions to TCPRstInt, initiating RST packet transmission.

Retry Interrupt for Lost ARP Reply Packet (TCPRtrIntStatus[0])

The retry interrupt for lost ARP reply packets (bit[0] of TCPRtrIntStatus, common group) operates without a maximum limit on retry attempts. Similarly, bit[22] and bit[23] of TCPRtrIntStatus (session#0) are unrestricted for lost received data and reverse packet detection respectively.

Figure 28 - TCPRtrIntStatus[0] Assertion
Figure 28 — TCPRtrIntStatus[0] Assertion

Retry Interrupt for Lost SYN-ACK Packet (TCPRtrIntStatus[16])

In most cases, the retry process is limited to a maximum of 15 attempts before switching to the TCPRstInt interrupt type. Table 8 details the bit assignment for session interrupt with maximum limit.

Table 8 — Bit Assignment of TCPRtrIntStatus for Session Interrupt with Maximum Limit
Interrupt Status Session#0 Session#1 Session#2 Session#3
Lost SYN-ACK bit[16] bit[32] bit[48] bit[64]
Lost ACK (passive open) bit[17] bit[33] bit[49] bit[65]
Lost ACK (passive close) bit[19] bit[35] bit[51] bit[67]
Lost ACK (data transmission) bit[20] bit[36] bit[52] bit[68]
Lost Window update bit[21] bit[37] bit[53] bit[69]
Figure 29 - TCPRtrIntStatus[16] Assertion
Figure 29 — TCPRtrIntStatus[16] Assertion

Retry Interrupt for Lost ACK Packet During Data Transmission (TCPRtrIntStatus[20])

The TCPRtrIntStatus[20] interrupt is generated when: (a) expected ACK not received within TCPCtlTimeOutSet timeout, or (b) first duplicate ACK packet received (subsequent duplicates with same ACK value are ignored). Upon either condition, IP retransmits unacknowledged data and asserts both TCPRtrInt and TCPRtrIntStatus[20]. After 15 retries without resolution, a reset interrupt is asserted.

Figure 30 - TCPRtrIntStatus[20] Assertion
Figure 30 — TCPRtrIntStatus[20] Assertion

Reset Interrupt for Lost SYN-ACK Packet (TCPRstIntStatus[16])

Figure 31 - TCPRstIntStatus[16] Assertion
Figure 31 — TCPRstIntStatus[16] Assertion

Reset Interrupt Without Retry (TCPRstIntStatus[18])

The reset interrupt can also be triggered without any retry process. Table 9 details the bit assignments for session interrupt without retry process.

Table 9 — Bit Assignment of TCPRstIntStatus for Session Interrupt Without Retry Process
Interrupt Status Session#0 Session#1 Session#2 Session#3
Lost FIN and ACK (active close) bit[18] bit[34] bit[50] bit[66]
RST packet reception bit[24] bit[40] bit[56] bit[72]
Unsupported packet reception bit[25] bit[41] bit[57] bit[73]
Figure 32 - TCPRstIntStatus[18] Assertion
Figure 32 — TCPRstIntStatus[18] Assertion

The User Interface of TOEMACIF

The TOEMACIF module serves as the interface connecting the TOE200GADV IP and the 200G Ethernet Hard IP (Agilex7 F-Tile Ethernet Hard IP). It is provided separately from the TOE200GADV IP, enabling users to integrate additional modules for Ethernet packets transmission through the 200G Ethernet Hard IP.

The TOEMACIF comprises two submodules, allowing for concurrent packet transfer in both transmission and reception directions. The user interface of TOEMACIF is compatible with the 1024-bit Avalon stream bus, but it does not include a 'Ready' signal to pause data transmission in the Rx user interface.

TOEMACIF Tx Interface

While TOEMACTxSOP is provided as an input, TOEMACIF does not use this signal to indicate the start of a packet. It detects the first data of the packet when it is received after the end of the preceding packet or after a reset. Given that the Ethernet Hard IP necessitates continuous data transmission for each packet transfer, TOEMACIF requires the Tx user interface to maintain TOEMACTxValid asserted until the last data of packet is completely transmitted. If the TxMAC buffer becomes full, TOEMACTxReady is set to 0b to temporarily pause packet transmission.

Figure 33 - Tx Interface of TOEMACIF
Figure 33 — Tx Interface of TOEMACIF

TOEMACIF Rx Interface

When data is available in the RxMAC buffer, TOEMACIF initiates packet transfer by setting TOEMACRxValid to 1b. Packet transmission may pause temporarily when no more data remains in the RxMAC buffer. During the last data transfer cycle, the user must verify TOEMACRxError to ensure the packet does not contain any errors.

Figure 34 - Rx Interface of TOEMACIF
Figure 34 — Rx Interface of TOEMACIF

MACRxInt Assertion When RxMAC Buffer Overflows

TOEMACIF includes a 64KB RxMAC buffer designed to store received packets from the Ethernet Hard IP. In the theoretical situation where continuous reception of 64-byte Ethernet packets occurs with a 'Clk' frequency lower than the 'MacClk' frequency (402.832 MHz), the RxMAC buffer may reach its storage limit. The MACRxInt signal indicates when the RxMAC buffer reaches full capacity, prompting TOEMACIF to discard the incoming packet and await the next packet.

Figure 35 - MACRxInt Assertion after the RxMAC Buffer Overflow
Figure 35 — MACRxInt Assertion after the RxMAC Buffer Overflow

Connection Termination of Unusual Cases

Figure 36 - Terminate Connection Sequence
Figure 36 — Terminate Connection Sequence

Verification Methods

The TOE200GADV IP Core functionality was verified by simulation and also proved on real board design by using Agilex 7 FPGA I-series development Kit.

Recommended Design Experience

Experience design engineers with a knowledge of Quartus Tools should easily integrate this IP into their design.

Ordering Information

This product is available directly from Design Gateway Co., Ltd. For pricing and additional information about this product, please refer to the contact information at the top of this datasheet.

Revision History

Revision Date Description
2.01 3-Apr-2026 Correct the retransmission detail in the section: 'Retry Interrupt for lost ACK packet during data transmission (TCPRtrIntStatus[20])'
2.00 2-Apr-2025 Add MSSInitValSet and TCPAckDlyTimeSet for Core IO Signals of TOE200GADV IP
1.01 11-Dec-2024 Update Agilex7 I-Series Part Number
1.00 13-Nov-2024 Initial release