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1 Introduction 2 Hardware overview 2.1 F-Tile Ethernet Hard IP 2.2 QSFPConfig 2.3 TOEMACIF 2.4 AvlSSw2to1 2.5 TOE200GADV-IP 2.6 User2MAC 2.6.1 UserTxMac 2.6.2 UserRxMAC 2.7 CPU and Peripherals 2.7.1 AsyncAvlReg 2.7.2 UserReg 3 CPU Firmware on FPGA 3.1 Display parameters 3.2 Reset parameters 3.3 Half Duplex Test 3.4 Full duplex test 3.5 Ping reply test 3.6 Function list in CPU firmware 3.6.1 Function for High-Speed Connection 3.6.2 Functions for Low-Speed Connection 4 Test Software on PC 4.1 ‘tcpdatatest’ application (Half duplex test) 4.2 ‘tcp_client_txrx_single’ application (Full duplex test) 5 Revision History Return to Top

TOE200GADV-IP reference design