1 Introduction 2 Hardware overview 2.1 Low Latency 40G Ethernet Intel FPGA IP 2.2 TOE40G-IP 2.3 TOEMacFfIF 2.4 Avl2Reg 2.4.1 AsyncAvlReg 2.4.2 UserReg 3 CPU Firmware Sequence 3.1 Show parameters 3.2 Reset IP 3.3 Send data test 3.4 Receive data test 3.5 Full duplex test 4 Test Software Sequence 4.1 ?tcpdatatest? for half duplex test 4.2 ?tcp_client_txrx_40G? for full duplex test 5 Revision History Return to Top