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1 Introduction
2 Hardware Overview
2.1 MemBus2Reg Module
2.2 AsyncBusReg
2.3 UserReg
2.3.1 Key setting
2.3.2 Parameter setting
2.3.3 Encryption
2.3.4 Decryption
3 CPU Firmware
3.1 Set encryption/decryption key
3.2 Set encryption/decryption IV
3.3 Set AAD for Encryption/Decryption
3.4 Show Data Memory
3.5 Fill Plain Data Memory
3.6 Encrypt Data
3.7 Loop verification
3.8 Fill Cipher Data Memory
3.9 Decrypt
4 Revision History
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AES256GCM1G-IP Reference Design