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1 Introduction
2 Hardware Overview
2.1 MemBus2Reg Module
2.2 AsyncBusReg
2.3 UserReg
2.3.1 Key/IV Setting
2.3.2 Parameter Setting
2.3.3 Encryption/Decryption/Bypass Operation
2.3.4 SpeedTest Operation
3 CPU Firmware
3.1 Change Mode
3.2 Set Encryption/Decryption Key
3.3 Set Encryption/Decryption IV
3.4 Edit AAD & Data Memory
3.5 Show AAD & Data Memory
3.6 Execute Operation
4 Revision History
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ChaCha20Poly1305-IP Reference Design