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1 NVMe 2 Hardware overview 2.1 TestGen 2.2 NVMe 2.2.1 NVMeSW-IP 2.2.2 Integrated Block for PCIe 2.2.3 Dual port RAM. 2.3 CPU and Peripherals 2.3.1 AsyncAxiReg 2.3.2 UserReg 3 CPU Firmware 3.1 Identify Command 3.2 Write/Read Command 3.3 SMART Command 3.4 Flush Command 3.5 Shutdown Command 4 Example Test Result 5 Revision History Return to Top

NVMeSW IP Core reference design manual