DesignGateway Hot! News
August 2017
IPLock is FPGA logic security system which used very reliable AES encryption technology. IP properties in FPGA are protected from illegal copy by only including IP Lock in FPGA and connecting with encryption controller chip.Learn more about IPLock

IPLock Introduction Demo video on youtube

"IPLock" AES Encryption IP Security System
Easy to protect your IP core & logic data !
  • Step1: Prepare SOIC-8 pattern for security chip on your board
  • Step2: When you need FPGA logic protection, purchase IPLock
  • Step3: Compile your FPGA logic with IPLock core
  • Step4: Put IPLock security chip on FPGA board
  • Step5: Complete IP core protection!
Learn more about IPLock

Technology for Strong Protection
  • AES-128 encryption
  • Change & encrypt authentication data every 200msec cycle
  • Generate true random authentication data by natural random number generator
  • Immediately stop user logic when removing the chip
Learn more about IPLock

Support both prototype and mass production
  • Laboratories Pack for prototype
    It contains encryption chips (10pcs or 30pcs) which are already written unique ID.

  • Writer Set & Blank Encryption chip for mass production
    User can write any ID key to blank encryption chip by using IP Lock write. User can set and write optional ID key for each products or lot.
Learn more about IPLock

"IPLock" is available on MOUSER
You can purchase IPLock from Mouser Electronics, Inc.
MOUSER Production Page

Technical Updates



NEPCON South China 2017
Date: 29 - 31 August 2017
Place: Shenzhen Convention & Exhibition Center

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