DesignGateway Hot! News June 2018

	[ SDLink ] Easy & High-speed update FPGA logic data!
	SDLink is a high speed FPGA configuration module which stores configuration data on microSD card. It is easily updated by just swapping microSD card. SDLink solves the problem of programming time for Huge scale FPGAs!! SDLink is available for the latest FPGA devices such as Intel Arria 10 series and xilinx UltraScale series. More detail about SDLink SDLink Demo video clip on Youtube

SDLink solves the problem of programming time for Huge scale FPGAs!! Ultra High-Speed Programming!! Just 3 second to program 20 MBytes (= 160Mbit) configuration data. (comparison with on board flash, it takes about 7 minutes...) More information about High-Speed programming & Configuration here!! Easy to update the circuit by swapping microSD!! [For Developers] More easy to Evaluate various circuit patterns! If you prepare multiple microSD cards and program deferent configuration data, you can evaluate and test these circuit patterns without suspending to re-program. Your development will be drastically faster!! More detail No Need Programming tools No Need Download Cable No Need System suspended [For Product updates] More quickly to mass-product updates! Just to swap microSD card to update the circuit data immediately. Because you do not need to program to board directly anymore, you can quickly support circuit modification, update and change setting after delivery. More detail More detail about Usability of SDLink Able to purchase from Mouser!! You can purchase SDLink from Mouser Electronics, Inc. MOUSER SDLink Production page News NVMe IP achieves 2242MB/sec Write speed with Intel Optane SSD 900P on Intel Arria 10 SX! NVMe-IP achieves high performance with Intel Optane SSD 900P. This is suitable for high-performance write operation application such as high-speed data recording system. NVMe-IP core Page about Intel Optane SSD 900P NVMe-IP performance demo on Intel Arria 10 SX, with Intel Optane SSD 900P Technical Updates NVMe-IP Xilinx FAT32 IP for NVMe IP Datasheet Rev1.1 - Updated FAT32 IP or NVMe IP Reference Design Document Rev1.1 - Updated FAT32 IP or NVMe IP Demo Instruction Document Rev1.1 - Updated SATA-IP Xilinx SATA IP Datasheet Rev2.3 - Updated SATA HTCL IP Datasheet Rev1.5 - Updated SATA HCTL IP Reference Design Document Rev1.5 - Updated SATA HCTL IP Demo Instruction Document Rev1.7 - Updated Events Interop Tokyo 2018 Date : 13-15 June 2018 Place: Makuhari Messe, Japan More Information JPCA Show 2018 Date: 6-8 June 2018 Place: Tokyo Big Sight, Japan More Information IMAGE SENSING SHOW 2018 Date: 13-15 June 2018 Place: PACIFICO YOKOHAMA, Japan More Information 29th Design Engineering & Manufacturing Solutions Expo (DMS) Date: 20-22 June 2018 Place: Tokyo Big Sight, Japan More Information 9th Medical Device Development Expo (MEDIX) Date: 20-22 June 2018 Place: Tokyo Big Sight, Japan More Information 26th 3D & Virtual Reality Expo (IVR) Date: 20-22 June 2018 Place: Tokyo Big Sight, Japan More Information E3 2018 Date: 12-14 June 2018 Place:Los Angeles Convention Center, USA More Information NEPCON Thailand 2018 Date: 20-23 June 2018 Place:BITEC Bangkok, Thailand More Information Communic Asia 2018 Date : 26-28 June 2018 Place : Marina Bay Sands Singapore More Information Privacy Protection Policy DesignGateway recognizes the importance of personal information protection, and strive to protect personal information. We absolutely do not transfer it to a third party. Distributed stop / Address change / Register If you do not wish us to send or if your E-mail address is changed, please contact following page. https://dgway.com/mailmaga_E.html Publisher DesignGateway Co., Ltd. http://www.design-gateway.com/ Mail：ip-sales@design-gateway.com | About Us| Contact| (c) 2018 Design Gateway Co., Ltd.