1 Introduction 2 Hardware overview 2.1 AsyncAvlReg 2.2 UserReg 2.2.1 Storing certificate information 2.2.2 Key material information 2.2.3 AXI bridge 2.2.4 User data generator 2.2.5 User data verification 2.2.6 Memory allocation for user streams 2.2.7 HTTP/3 minimum stream requirement compliance 2.3 Ethernet subsystem. 2.3.1 Ethernet Hard IP on Agilex 5 3 CPU firmware 3.1 Set Gateway IP address 3.2 Set FPGA IP address 3.3 Set FPGA MAC address 3.4 Load network parameters 3.5 Set FPGA port number 3.6 Show key materials 3.7 Show certificate information 3.8 Show session parameters 3.9 Download data pattern with HTTP GET command 3.10 Upload data pattern with HTTP POST command. 20 Upload data pattern with HTTP POST command 3.11 Upload and Download data pattern like secnetperf 21 Upload and Download data pattern like secnetperf 4 Revision History Return to Top