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March 2017


[ UDP1G IP core ] Low Latency Network Solution by All HW Logic UDP!!
UDP1G IP core is the epochal solution implemented without CPU. It supports Full Duplex transmission. This IP core is suitable for network applications which requires Broadcasting and Low Latency.
More information of UDP1G IP for Xilinx More information of UDP1G IP for Intel
Merit of UDP1G IP
Very Low Latency by Fully hard-wired UDP!
Possible to build CPU-less network system and Zero load for CPU. In Full Duplex operation, usually CPU needs to process time sharing between Tx&Rx and bandwidth and latency further drops. However UDP1G IP core is implemented with independent module for Tx and Rx to achieve very small overhead and very low latency.

Reduce Cost and Time!!
UDP1G IP core includes reference design. It helps you to reduce develop time and cost. Free evaluation files are available for you to check the performance on real board before purchasing the core.
Presentation of UDP1G IP for Xilinx Presentation of UDP1G IP for Intel

Application Example
Video on Demand via Broadcasting
Low latency of UDP1G IP core is suitable for video streaming in real time.


Real time Online game
Online game requires bidirectional communication for downloading game data from server and sending user control without time lag. Low latency UDP1G IP core supports Full Duplex to achieve Tx and Rx with each independent module.


Technical Updates
UDP1G-IP

TOE10G-IP

展示会情報
SEMICON CHINA
Date: 14 - 16 Mar 2017
Place: Shanghai New International Expo Centre
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CeBIT 2017
Date: 20 - 24 Mar 2017
Place: Deutsche Messe, Hannover/Germany

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CABSAT 2017
Date: 21 - 23 Mar 2017
Place:DUBAI WORLD TRADE CENTRE

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