DesignGateway Hot! News May 2017 |
|
[ USB3.0 IP ] Easy to apply to FAT32 Data Recorder System!! | |
USB3.0 IP core complaints with the USB 3.0 specification Revision1.0. This IP core provides
link layer and protocol layer. Physical layer interfaces to PHY chip by
TI. Mass storage class reference design is included in the IP core license. You can start your development from
the design bit by bit. |
|
More information of USB3.0 IP for Xilinx | More information of USB3.0 IP for Intel |
|
|