DesignGateway Hot! News November 2017

[ NVMe IP ] 2ch RAID0, Linux driver and FAT32 support for more practical application!!
NVMe IP core achieves more performance with 2ch RAID0 reference design, the Read speed over 6.2GB/sec and Write speed over 4.2GGB/sec!! NVMe IP has rich options, for example Linux driver is able to analize recording data by Linux application running on SoC device after high-speed recording. By FAT32 IP for NVMe IP, it can access file system without CPU. These practical options help you to shorten time and reliable development.
Learn More for Xilinx	Learn More for Intel
Demo on Xilinx KCU105	Demo on Intel Arria 10 SX

NVMe IP's Rich Options to Shorten the development time 2ch RAID0 Reference Design You can build 2ch RAID0 with 2 NVMe-IP cores in the system. It is easy to apply for high-end products such as ultra high-speed data recorder. Linux Driver Ultra high-speed data recording to SSD is handled by NVMe-IP core without CPU, then Linux driver read the data from SSD to analize it by Linux application on SoC device. It is suitable for stand-alone data recording-analisis system. FAT32 access without CPU The system can manage data as files and share files with computer. It is effective and easy for you to use data and apply for any applications. Presentation for Xilinx Presentation for Intel

News NVMe-IP is available on Alaric Instant-DevKit!! DesignGateway release NVMe-IP core reference design for Alaric Instant-DevKit. You can evaluate the performance of both 1ch NVMe-IP demo and 2ch RAID0 demo with the board now! Learn more about NVMe-IP Learn more about ReFLEX CES Learn more about Alaric Instant-DevKit Technical Updates NVMe-IP Intel NVMe-IP Leaflet Rev2.0 - New NVMe-IP Presentation Rev1.5AE - Updated NVMe-IP 1ch Demo Instruction Document Rev2.3 - Updated NVMe-IP 1ch Evaluation Demo File (for Alaric Instant-DevKit) - New NVMe-IP 2ch RAID0 Evaluation Demo File (for Alaric Instant-DevKit) - New Xilinx NVMe-IP Leaflet Rev2.2 - New NVMe-IP Presentation Rev1.7XE - Updated NVMe-IP 2ch RAID0 Reference Design Document Rev1.0 -New NVMe-IP 2ch RAID0 Demo Instruction Document Rev1.0 - New NVMe-IP 2ch RAID0 Evaluation Demo File (for KCU105) - New SATA-IP Intel FAT32 IP for SATA HOST IP Datasheet Rev1.0 - New FAT32 IP for SATA HOST IP Reference Design Document Rev1.0 - New FAT32 IP for SATA HOST IP Demo Instruction Document Rev1.0 - New FAT32 IP for SATA HOST IP Evaluation Demo File (for Arria 10 SX) - New Xilinx FAT32 IP for SATA HOST IP Reference Design Document Rev1.0 - New FAT32 IP for SATA HOST IP Demo Instruction Document Rev1.0 - New FAT32 IP for SATA HOST IP Evaluation Demo File (for KC705) - New Event Japan IT Week Autumn Date: Nov. 8 (Wed) - 10 (Fri), 2017 10:00-18:00 Place: Makuhari Messe, Japan More Information Embedded Technology / IoT Technology 2017 Date: November 15 (Wed.) - 17 (Fri.), 2017 Place: PACIFICO YOKOHAMA, Japan More Information International Broadcast Equipment Exhibition 2017 Date: Nov. 15 (Wed) - 17 (Fri), 2017 10:00-18:00 Place: Makuhari Messe, Japan More Information 2nd　Laser Science Technology Fair 2017 Date: 14-16 November, 2017　10：00～17：00 Place: Science Museum, Tokyo More Information 2017 Microwave Workshops & Exhibition (MWE 2017) Date: Nov. 30 - Dec. 2, 2017 Place: PACIFICO YOKOHAMA, Japan More Information System Control Fair 2017 (SCF2017) TOKYO Date: November 29(Wed.) - December 1(Fri.), 2017 Place: TOKYO BIG SIGHT　West Hall 1,3,4 & Atrium More Information Privacy Protection Policy DesignGateway recognizes the importance of personal information protection, and strive to protect personal information. We absolutely do not transfer it to a third party. Distributed stop / Address change / Register If you do not wish us to send or if your E-mail address is changed, please contact following page. https://dgway.com/mailmaga_E.html Publisher DesignGateway Co., Ltd. http://www.design-gateway.com/ Mail：ip-sales@design-gateway.com | About Us| Contact| (c) 2016 Design Gateway Co., Ltd.