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Nano-order Super Low Latency Networking IP cores for Fintech

32-session reference design enables simultaneous order trading across multiple financial markets Learn more for Xilinx | Learn more for Intel

Low Latency 10GEMAC-IP (LL10GEMAC-IP) Low Latency UDP10GRx-IP (LLUDP10GRx-IP) Low Latency TOE10G-IP (TOE10GLL-IP) Round Trip Latency Rx Latency Tx Latency 65.1 ns 37.2 ns 6.2 ns * Click to check Latency * Click to check Latency * Click to check Latency LL10GEMAC-IP Xilinx AAT Demo LLUDP10GRx-IP 16 Session Demo TOE10GLL-IP 32 Session Demo DG's Low latency IP demo together with Xilinx's open-source reference design, Accelerated Algorithmic Trading (AAT) is now available on Alveo U50 and U250 Card.

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