The Expert of IP Core & Embedded

Supercharge your trading strategies with the Accelerated Algorithmic Trading (AAT) Accelerator & System - a cutting-edge turnkey solution engineered to meet the relentless demands of today's financial markets. Powered by FPGA acceleration and ultra-low-latency IP core technology, the AAT System is the ultimate tool for Brokers, Exchanges, Market Data Vendors, Sell-Side Vendors, and Proprietary Traders seeking a definitive competitive edge.

DG's Low latency IP Cores (TOE, UDP and EMAC) demo together with Accelerated Algorithmic Trading (AAT) reference design based on HLS(C/C++) example code is now available on Alveo X3552PV Card and also standard alone AMD FPGA Boards. Click for demo

The Accelerated Algorithmic Trading with QDMA (AAT-QDMA) demo is the latest reference design demonstrates a high-performance trading system over 10G Ethernet based on best in class cost effective and super low latency, Alveo X3552PV Card and HLS(C/C++) based reference design for High Frequency Trading application by FPGA hardware. More detail

• 10 Gbps Ethernet MAC and PCS
• Directly connecting with 32-bit PMA by AMD IP wizard
• Low latency: 65.1 ns for round-trip latency
  18.6 ns for Tx path, 21.7 ns for Rx path,
  24.8 ns for PMA latency
• Small resource utilization
• Minimum Tx packet size: 5 bytes
• FCS (CRC-32) inserting and checking
• Individual clock domain for transmit and receive interface at 322.265625 MHz
• Reference design available on AMD FPGA boards
• AAT demo available on AMD Alveo cards
  • Free Evaluation files from GitHub
• Listed in the AMD Adaptive Computing Partner Solutions

YouTube Video

DG LL 10G EMAC-IP + AAT QDMA Demo

• All Hard wired Logic, CPU less and no external memory required
• Operation mode: Unicast or Multicast (IGMPv3)
• Support Multi-session up to 4 sessions
  (More sessions can be customized)
• Configuration mode: Master or Slave
  (for multiple IP connecting)
• Direct connect with super low latency DG 10GbE MAC core (LL10GEMAC-IP)
• HDL design for minimized resource and latency
• RX Latency: 37.2 ns (@ 322.266MHz)
• Available reference design: 4 and 16 sessions demo
• Listed in the AMD Adaptive Computing Partner Solutions

YouTube Video

DG LL UDP10GRx-IP 16 Sessions demo for FinTech

• All Hard wired Logic, CPU less and no external memory required
• Configured by two data transmission mode:
  Simple mode & Cut-through mode
• Support 1 sessions (More sessions can be customized)
• Support ICMP Echo reply (Ping): Up to 118-byte payload data
• Direct connect with super low latency DG 10GbE MAC core (LL10GEMAC-IP)
• HDL design for minimized resource and latency
• Low Latency: (@ 322.265625 MHz)
  • RX Latency: 46.5 ns
  • TX Latency: 6.2 ns
• Available reference design: 1 and 32 sessions demo
• Listed in the AMD Adaptive Computing Partner Solutions

YouTube Video

DG TOE10GLL-IP 32 Sessions demo