The latest Technical Documents Update here
| [ N E W R E L E A S E ] No CPU solution for ultra high speed 12GB/s! TCP transmission over 100GbE |
| 100GbE TCP Offloading Engine (TOE100G-IP) IP core is the latest generation of DG's TOE-IP which is designed to get maximum throughput from 100GbE(25x4) link. TOE100G-IP is capable of full TCP/IP offload and able to achieve 12GB/s without CPU required. It's an ideal solution for ultra high speed and long distance data transmission over TCP and standard 100GbE optical cable. Try our demo today to see its incredible performance. Watch the performance on YouTube |
| Learn more : TOE100G IP for Xilinx | Learn more : TOE100G IP for Intel |
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New YouTube Videos
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 TOE100G-IP Application Example Picture story Blog  |
 What is Latency? Why does Latency matter? DG Technology Blog |
Feb 25, 2020 [ NEW PRODUCT RELEASE ]TOE100G IP TCP Offloading Engine IP core is the epochal solution implemented without CPU. Generally, TCP processing is so complicated that expensive high-end CPU is required. TOE100G-IP built by pure hardwired logic can take place of such extra CPU for TCP protocol management. This IP product includes reference design. It helps you to reduce development time and cost.Learn more about TOE100G IP (for Xilinx)┃Learn more about TOE100G IP (for Intel) |
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Dec 7, 2020Design Gateway joined Intel® FPGA Technology Day 2020 in Japan |
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Dec 1, 2020 [ NEW PRODUCT RELEASE ]SHA-256 IP is an optimized and efficient implementation of a secure hash algorithm SHA-256 specified in FIPS 180-4 standard. SHA256-IP can process 512-bit data blocks in just 65 clock cycles. Delivering 7.875Mbps throughput per 1MHz clock such as 1.575 Gbps throughput @ 200MHz. Learn more about SHA-256 IP |
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Sep 1, 2020 [ NEW PRODUCT RELEASE ]raNVMe-IP (Random Access NVMe IP) is the new generation of NVMe-IP series which is intentionally optimized for random access and low latency time. raNVMe-IP can achieve more than 500K IOPS for random write access on high performance NVMe SSD without CPU intervention. Ideal for the application such as Database Search Application which requires multiple access to NVMe SSD with best performance. Learn more about raNVMe-IP for Xilinx |
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Aug 5, 2020 [ NEW PRODUCT RELEASE ]New Application Specific IP is opened now. Design Gateway Co., Ltd. provides Application Specific IP cores (AS-IP) based on rich experience from provider of high-speed Storage and Networking IP Cores (Giga Bit IP cores). The AS-IP focus applications which require high-speed and low latency such as finance and network equipments.Learn More :Learn more about TOE25G IP for Xilinx |
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Jun 2, 2020 [ NEW PRODUCT RELEASE ]New Application Specific IP is opened now. Design Gateway Co., Ltd. provides Application Specific IP cores (AS-IP) based on rich experience from provider of high-speed Storage and Networking IP Cores (Giga Bit IP cores). The AS-IP focus applications which require high-speed and low latency such as finance and network equipments.Learn More :Application Specific IP page Low Latency Networking IP is designed from the ground up for very low latency requirements. Especially, FinTech applications such as high-frequency trading (HFT), high speed trading (HST), Market Data Processing and Tick-to-Trade (T2T) systems. We can provide total solutions for low latency Networking IP cores and FPGA logic customization for application specific requirements. Learn more about LL Networking IP tCAM-IP is a high performance, extremely low latency and highly configurable ternary content-addressable memory IP. tCAM-IP can make deterministic search at 200MSPS continuously speed with constant latency at 7 clock cycles. It can achieve matching/filtering performance at 2,000,000 packets per second over 40G/100G Ethernet. It is ideal for variant applications such as network packet filtering/forwarding, intelligent switch/router, deep packet inspection and network security application. Learn more about tCAM IP |
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May 12, 2020 [ Article RELEASE ]An article about NVMeG3 IP core with PCIe Gen3 Soft IP is published on Digikey Article Library. Describes NVMe-IP implementation example and advantage on Xilinx ZCU102 board.Read Article : Enabling the NVMe SSD Interface on a Xilinx ZCU102 Evaluation Kit |
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May 5, 2020 [ NEW PRODUCT RELEASE ]NVMeG3IP core <for Intel> including PCIe Gen3 Soft IP inside is released. Enabling NVMe PCIe Gen3 SSD storage solutions with no CPU/OS required. Break the barriers of NVMe SSD interface, Allow to build multi-channel RAID system with very high performance and lowest possible FPGA resources consumption.Learn More : NVMeG3-IP core Intel page Introduction & Demo Video : Watch the performance demo on YouTube |
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Feb 5, 2020 [ NEW PRODUCT RELEASE ]NVMeG4 IP core including PCIe Gen4 Soft IP inside is highly integrated, standalone NVMe Host Controller with built-in PCIe Gen4 root complex IP core for Xilinx’s high end UltraScale+ device. Enabling NVMe PCIe Gen4 SSD storage solutions with no CPU/OS required. Achieving 200% performance improvement with just +30% FPGA resources usage. Break the barriers of NVMe SSD interface, Allow to build multi-channel RAID system with very high performance and lowest possible FPGA resources consumption.Learn More : NVMe-IP core Xilinx page The result of performance of NVMeG4-IP on Xilinx VCU118 Write=4,288MB/sec Read=4670MB/sec. Watch the performance demo on YouTube |
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Jul 10, 2019 [ NEW PRODUCT RELEASE ]DG 10GbE MAC core implements the MAC layer for TOE/UDP10G-IP core. It is fully compatible with Intel MAC core and highly compatible with Xilinx MAC. It achieves Super Low latency and High-speed networking system.
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Jul 1, 2019IPL-CHP1.8V which can drive with 1.8V is just released. It directly supports 1.8V I/O of the latest FPGAs. Because it also supports both voltage of 1.8V / 2.5V / 3.3V, the design flexibility is improved.Learn More IPLock FPGA logic security system |
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May 29, 2019NVMe-IP PCI Express switch feature is just released for Intel and Xilinx FPGA devices. Able to connect multi-SSDs and/or access from other host device. (About PCIe switch option, please contact us). Evaluation Demo video on YouTube!!
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May 13, 2019TOE40G-IP core is the pure hardware logic solution, TCP/IP protocol is handled 100% by IP core. Enabling TCP network communication to FPGA system without need CPU/OS or external memory. The performance of TOE40G-IP core reach to nearly 5GB/s on Arria® 10 GX and Zynq Ultrascale+(ZCU102/ZCU106). Evaluation Demo video on YouTube!!
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Apr 2, 2019TOE10G-IP core supports Intel Programmable Acceleration Card (PAC) now.TOE10G-IP Intel PAC Demo on YouTube Learn More TOE10G-IP core page for Intel |
 Intel PAC Demo on YouTube |
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Nov 12, 2018DesignGateway will arrange 2nd Digital Design with FPGA Camp (DD-Camp) at Chulalongkorn University in Thailand on 20 December 2018 - 4 January 2019. DesignGateway inspire and encourage Thai’s Engineering Students to come into the field of Programmable Digital Design.DD-Camp Facebook page |
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Oct 1, 2018TOE40G-IP core is released now.Learn More TOE40G-IP core page for Xilinx |
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Sep 21, 2018Design Gateway joins Intel® FPGA Technology Day 2018 in Tokyo as Intel® DSN Platinum partner. We shown demonstrations of NVMe-IP on Intel® Arria® 10 SX SoC board. Learn more |
 NVMe-IP introduction Video Clip |
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Sep 6, 2018NVMe-IP core on Intel FPGA Inside Edge in September 2018. |
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Sep 6, 2018We are pleased to partner with AXIOS / Uniquest on IP core demo at Intel FPGA Technology Day (IFTD) 2018, Seoul, Korea. |
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Aug 20, 2018Design Gateway joins Intel® FPGA Technology Day 2018 in Shenzhen as Intel® DSN Platinum partner. We will show demonstrations of NVMe-IP and TOE10G-IP on Intel® Arria® 10 SX SoC board. Learn moreDate: 17 Sep 2018 (Mon) Place: The Westin Shenzhen Nanshan, Shenzhen, China |
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July 17, 2018NVMe IP core New additional features are released.
Learn More NVMe-IP for Intel / NVMe-IP for Xilinx Presentation NVMe-IP for Intel / NVMe-IP for Xilinx |
 Intel Arria 10 SX demo on YouTube  Xilinx KCU105 demo on YouTube |
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July 11, 2018NVMe IP and TOE10G IP introduction and performance demo videos are available on Intel FPGA YouTube channel.
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June 14, 2018DesignGateway provides high-speed Storage and Networking solutions and available on Intel Arria 10 SX development kit. Evaluation demo videos are on youtube.Learn More DesignGateway GIGA Bit IP cores for Intel |
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 NVMe-IP 2ch RAID |
 TOE10G-IP Demo |
 UDP10G-IP Demo |
 SATA-IP 4ch RAID |
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June 6, 2018Total solution for NVMe IP core on Intel FPGA and Intel optane 900p SSD. Impressive performance over 2,200MB/sec (sequential write) and over 2,700MB/sec (sequential read) on Intel Arria 10 SoC development kit.Learn More NVMe-IP core (Intel) About Intel Optane SSD 900P |
NVMe-IP Demo with Optane SSD 900P on Arria 10 SX |
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Apr 27, 2018Design Gateway is Xilinx® Alliance Program Certified Partner. go to Alliance Program Page |
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Apr 1, 2018Design Gateway is Intel ® FPGA Design Solutions Network (DSN) Platinum Partner. go to DSN Page |
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Mar 2, 2018Design Gateway NVMe-IP solutions now support PLDA PCIe Soft IP for Xilinx device. Enabling the unique high performance and cost-effective NVMe Host Controller solution for FPGA data storage application, especially, NVMe PCIe Gen3 support for the low-cost & high performance device family such as Kintex-7 and Zynq UltraScale+ device without embedded PCIe Gen3 Hard IP.Watch NVMe-IP + PLDA PCIe IP Evaluation demo on youtube Learn More NVMe-IP core (Xilinx) about PLDA about PCIe Gen3 soft IP "XpressRICH3 IP" |
 NVMe-IP + PLDA PCIe IP Demo |
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Feb 6, 2018SATA IP core supports Zynq Ultrascale+.Watch SATA IP 4ch RAID Evaluation demo on Xilinx Zynq Ultrascale＋(ZCU102) on youtube Learn More SATA-IP core (Xilinx) |
 SATA-IP 4ch RAID Demo (ZCU102) |
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Jan 11, 2018SDLink is a high speed FPGA configuration module which stores data on microSD card. High availability,High capacity and High-speed programming.Learn more about SDLink Purchase from  |
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Dec 20, 2017DesignGateway arranged 1st Digital Design with FPGA Camp (DD-Camp) at Chulalongkorn University in Thailand on 14-27 December 2017. DesignGateway inspire and encourage Thai’s Engineering Students to come into the field of Programmable Digital Design.DD-Camp Facebook page |
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Dec 12, 2017DesignGateway release SATA-IP core reference design for ReFLEX CES Alaric Instant-DevKit. You can evaluate the performance of SATA-IP 4ch RAID demo and with the board now!Learn more SATA-IP page About ReFLEX CES  About Alaric Instant-DevKit |
 SATA-IP Demo (Alaric Instant DevKit) |
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Dec 7, 2017NVMe IP core supports Zynq Ultrascale+ with PCI express Gen3.Watch NVMe IP Evaluation demo on Xilinx Zynq Ultrascale＋(ZCU106) on youtube Learn More NVMe-IP core (Xilinx) |
 NVMe-IP Demo (ZCU106) |
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Nov 6, 2017DesignGateway release NVMe-IP core reference design for ReFLEX CES Alaric Instant-DevKit. You can evaluate the performance of both 1ch NVMe-IP demo and 2ch RAID0 demo with the board now!Learn more NVMe-IP page About ReFLEX CES / About Alaric Instant-DevKit |
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Sep 20, 2017Design Gateway joins Intel® FPGA Technology Day 2017 in Tokyo as Intel® DSN Gold partner. We will show demonstrations of NVMe-IP, SATA-IP and TOE10G-IP on Intel® Arria® 10 SX SoC board.Learn more IFTD17 page |
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Sep 5, 2017Design Gateway joins Intel® FPGA Technology Day 2017 in Seoul as Intel® DSN Gold partner. We will show demonstrations of NVMe-IP, SATA-IP and TOE10G-IP on Intel® Arria® 10 SX SoC board.Date: 12 Sep 2017 (Tue) 10:00 - 16:30 Place: Lotte Hotel World(Jamsil) 3F Emerald room, Seoul, South Korea |
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Jul 4, 2017Mouser Electronics, Inc. the leading company of electronics components begins handling Design Gateway products. You can purchase SDLink high-speed configuration module, IPLock IP security system and AB Series adapter boards for IP core evaluation. Learn More: MOUSER Page |
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Jun 1, 2017NVMe IP core is epochally improved to support BRAM operation without external memory such as DDR.The performance of the latest version drastically improves with built-in optimized PCIe bridge. It achieves over 3300MB/s (read) and over 2100MB/s (Write) ultra high-speed transfer on Arria® 10 SX and Kintex Ultrascale(KCU105). Evaluation Demo video on Youtube!!
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May 5, 2017AB07-USB3FMC-1.8VIF for USB3.0-IP core evaluation is released. It is for Virtex-7 and VC707 board which uses 1.8V I/O.Learn more USB3.0-IP FMC demo board Manual |
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Mar 1, 2017UDP1G-IP core is released. It is ideal for network applications that require broadcast and low latency!!UDP1G-IP core page for Xilinx│UDP1G-IP core page for Intel |
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2016年11月1日Design Gateway joins Intel® SoC FPGA Developper Forum (ISDF) in Tokyo as Intel® DSN Gold partner. We shown demonstrations of NVMe-IP, SATA-IP and TOE10G-IP on Intel® Arria® 10 SX SoC board. |
 NVMe-IP core on Arria® 10 SX |
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Aug 25, 2016Design Gateway joins Intel® FPGA Technology Day (IFTD16) in Singapore. |
 NVMe-IP core on Arria® 10 SX |
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