Secure communication with cryptographic algorithms requires intensive computation power and massively CPU time consuming to complete the tasks. Real-time secure communication processing while fully utilizing network bandwidth over 25G, 100G or more is very important, especially, in modern day Data Center.

AES-GCM is recommended symmetric-key cryptographic block ciphers for trusted protocols such as TLS and SSL, approved by NIST. By implementing AES256-GCM-100G IP core on FPGA as Hardware Acceleration, TLS and SSL communication can be processed in real-time at 100G Ethernet speed.

Design Gateway's AES256-GCM100G IP Core is designed to meet NIST standards with high performance throughput over 100Gbps. It's suitable TLS and SSL offload and acceleration by FPGA for any application that required 100G throughput over secure network communication.