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Fully hard-wired TCP/IP protocol control!! |
Possible to build CPU-less network system and Zero load for CPU |
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Support Full Duplex!! |
Over 1200MByte/sec real transfer speed for half-duplex and over 960MByte/sec
real transfer speed for full-duplex. |
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Support Multi-Session
Total Performance is still kept 10Gbps!! |
TOE10G-IP core is compact resource. It achieves multi-session by implementing
multiple cores in FPGA. Total performance does not drop even the number
of sessions increases. |
Max. 55 Sessions can be implemented in KCU105(XCKU040-2FFVA1156E)!! |
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Reduce Cost and Time!! |
TOE10G IP core includes reference design. It helps you to reduce develop
time and cost. Free evaluation files are available for you to check the
performance on real board before purchasing the core.
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TOE10G IP Presentation for Xilinx |
TOE10G IP Presentation for Altera |
TOE10G IP is adopted on "Data Acquisition Platform" for Scientific research
inspection equipment produced by FEI.
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Performance of TOE10G IP core Video Clip on Youtube |
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