DesignGateway Hot! News
September 2017
[ TOE1G/10G IP core ] Accelerates TCP communications, broadcasting and automotive "ALL-TCP/IP"!!
10GbE TCP Off-loading Engine(TOE1G/10G-IP) IP core is the epochal solution implemented without CPU. Generally, TCP processing is so complicated that expensive high-end CPU is required. TOE1G/10G-IP built by pure hardwired logic can take place of such extra CPU for TCP protocol management. This IP product includes reference design which helps you to reduce development time. DesignGateway provide demo binary file for Xilinx/Intel FPGA boards. You can evaluate TOE1G/10G-IP core on real board before purchasing.

Learn More for Xilinx (TOE10G-IP)
Learn More for Intel (TOE10G-IP)
Xilinx KC705 Demo on Youtube Intel Arria 10 SX Demo on Youtube
Advantages of TOE1G/10G IP
Support both Full Duplex & Half Duplex!!
Over 1200MByte/sec real transfer speed for half-duplex and over 960MByte/sec real transfer speed for full-duplex.
*TOE10G-IP

Enhanced Tx Function
  • Automatic Tx packet generation
  • Acquire MAC address of target by ARP at startup
  • Support both Server and Client mode (Passive/Active open and/or close)
  • Automatic retransmission function by timeout or Duplicate-ACK receiption
  • Intelligent flow control by window size detected from ACK packet
  • Able to specify process acceleration by PSH flag enabled in Tx packet.

Sophisticated Rx Function
  • Packet filtering to permit target packet only.
  • Automatic ACK return at ARP receiving
  • Duplicate-ACK transmission by Rx packet error detection
  • Data reordering based on sequence number of Rx packet
  • Window Update packet generation by continuous Rx buffer monitoring

Reduce Cost and Time!
TOE1G/10G IP core include reference design. It helps you to reduce develop time and cost. Free evaluation binary files are available for you to check the performance on real board before purchasing the IP core.
TOE10G IP Presentation for Xilinx TOE10G IP Presentation for Intel
 
Performance of TOE10G IP core Video Clip on Youtube
[ TOE10G IP ] Over 1200MB/sec on KC705!!

Xilinx KC705 Demo on Youtube

[ TOE10G IP] Keep high-performance over 960MB/sec with Full Duplex on Arria 10 SX!!

Intel Arria 10 SX Demo on Youtube
TOE1G IP for 1Gbit Ethernet
1Gbit Ethernet Off-loading, All Hardware Logic, without CPU
  • Support both Full Duplex & Half Duplex
  • Support Multi-session
  • Free evaluation on real boards before purchasing
  • Reference design is included in IP core product
TOE1G IP Presentation for Xilinx TOE1G IP Presentation for Intel

News
[IFTD17] Design Gateway joins Intel® FPGA Technology Day 2017
Design Gateway joins Intel® FPGA Technology Day 2017 in Seoul as Intel DSN Gold partner. We will show IP core demonstrations on Arria 10 SX SoC board.

Date: 12 Sep 2017 (Tue) 10:00 - 16:30
Place: Lotte Hotel World(Jamsil) 3F Emerald room, Seoul, South Korea

Learn More

Technical Updates
Gigabit IP cores

Event
19th AUTO-ID & COMMUNICATION EXPO
Date: 13 - 15 September 2017 10:00 - 17:00
Place: Tokyo Big Sight, Japan
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SENSOR EXPO JAPAN 2017
Date: 13 - 15 September 2017 10:00 - 17:00
Place: Tokyo Big Sight, Japan
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Intel FPGA Technology Day (IFTD)
Date: 12 September 2017 10:00 - 16:30
Place: Lotte Hotel World(Jamsil) 3F Emerald room, Seoul, Korea
Learn More
Design Gateway joins the exhibition.

Info Security Russia
Date: 19 - 21 September 2017
Place: Crocus Expo, Russia
Learn More

Electronica India
Date: 14 - 16 September 2017
Place: Pragati Maidan, New Delhi, India
Learn More

IBC2017
Date: 14 - 19 September 2017
Place: RAI Amsterdam
Learn More
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