DesignGateway Hot! News
May 2019
[ TOE IP core Series ] 40Gbps TCP Off-loading Engine is available now!!
TOE IP core series (TCP Off-loading Engine) which have accumulated achievements and high evaluations from many customers just lineup more high-speed "TOE40G-IP".

Learn more for Xilinx Learn more for Xilinx Learn more for Xilinx
Learn more for Intel Learn more for Intel Learn more for Intel
Features of TOE IP core Series
  • All pure hardware logic TCP/IP off-loading engine
  • Support Full Duplex communication
  • Support Multi-session (by implementing multiple cores)
  • Simple user interface
  • Small resource usage
  • Free evaluation on FPGA boards before purchasing
  • High performance nearly 5000 MByte/sec proven on real FPGA board (TOE40G-IP)
  • Reference design is included in IP core product

TOE40G IP ZCU106/102 demo
on YouTube

TOE40G IP Arria 10 GX demo
on YouTube
News
NVMe-IP for PCIe Switch
Now PCI Express switch feature is just released for Intel and Xilinx FPGA devices. Able to connect multi-SSDs and/or access from other host device. (About PCIe switch option, please contact us)


TOE10G IP + Intel PAC demo on YouTube
TOE10G-IP Intel PAC Demo on Intel FPGA YouTube Channel
TOE10G-IP core supports Intel Programmable Acceleration Card (PAC). The performance demo video is on Intel FPGA YouTube Channel.

Learn more about TOE10G-IP for Intel

Technical Updates
TOE10G-IP
TOE1G-IP
NVMe-IP
Events
Japan IT Week Spring 2019 Part 2
Date: May 8-10, 2019
Place: Tokyo Big Sight, Japan
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Wireless Technology Park 2019 (WTP2019)
Date: May 29-31, 2019
Place: Tokyo Big Sight, Japan
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Automotive Engineering Exposition 2019 Yokohama
Date: May 22-24, 2019
Place: Pacifico Yokohama, Japan
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Computex Taipei 2019
Date: May 28 - Jun 1, 2019
Place: Taipei Nangang Exhibition Center, Taipei World Trade Center, Taipei International Convention Center, Taiwan
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