
	View on Web Design Gateway Hot! News December 2021

Super Low Latency Networking IP for Fintech
with Practical Reference Designs to shorten develop time & cost

Design Gateway’s Low Latency Networking IP is designed from the ground up to achieve super low latency for TCP/UDP transmission over 10Gb network without CPU intervention. Especially for Quantitative Financial Technology (FinTech) Industry which requires lowest possible low latency. Our Solutions include both EMAC and Offload Engine IP. We provide IP cores together with customization services for application specific requirements.

Low Latency Networking IP for Xilinx	Low Latency Networking IP for Intel

Nanosecond-level Ultra-Low Latency, Achieved by FPGA

	Our EMAC implements both MAC layer and PCS (Physical Coding Sublayer) to reduce latency and able to interface directly with both Xilinx and Intel 10Gb PHY IP. Our TCP an UDP Offload Engine IP is designed to handle TCP/UDP protocol stack without need CPU and optimize for super low latency and high throughput.

Low Latency Reference Designs for Fintech Application

	AAT demo Reference Design
	Ultra high-speed Fintech (AAT) demo reference design with DG DG Low Latency Networking IP cores achieves ultra high-speed round trip latency 126 ns. AAT demo Reference Design Document┃AAT Demo Instruction

	16 Session Demo
	The 16 sessions reference design is implemented to support demand for multi-session Market Data receiving from financial markets in over the world at lowest possible latency with LL UDP10GRx-IP, especially for High Frequency Trading application. 16 Session Reference Design Document 16 Session Demo Instruction

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Design Gateway provides All Hardware Logic Storage & Network IP Cores for Intel FPGAs	Design Gateway NVMe-IP & TOE100G-IP to take full advantage of Intel® Agilex™ FPGA

Technical Updates

IP core Brochure┃Vivado IP catalog

NVMe-IP series ┃TOE-IP series┃UDP-IP series
AS-IP (Low latency networking IP / tCAM-IP/ SHA256-IP / AES128/256-IP)
Turnkey System Solution

Events

Intel ® FPGA Technology Day 2021 (IFTD)
Date : Dec 6-9, 2021 Read more

Design Gateway presents

Presentation:
All Hardware logic Storage & Networking IP core series

SEMICON Japan 2021
Date : Dec 15-17, 2021, Venue : Tokyo Big Sight / Online Read more