DesignGateway Hot! News April 2019

[ UDP1G/10G IP core ] Support Multicast/Broadcast high-speed Tx!!
UDP1G/10G IP core are the epochal solution implemented without CPU and supports High-speed Full Duplex. These IP cores are suitable for network applications that require broadcast and low latency. It can support multicast/broadcast high-speed transmission (optional).
Learn More (UDP10G-IP for Xilinx)	Learn More (UDP10G-IP for Intel)
Learn More (UDP1G-IP for Xilinx)	Learn More (UDP1G-IP for Intel)

New Feature of UDP1G/10G IP core Able to support Multicast/Broadcast Tx By optional customization, UDP10G-IP core can support multicast and broadcast transmission. About technical information, please contact DesignGateway. UDP10G IP Presentation for Xilinx UDP10G IP Presentation for Intel

News TOE10G-IP supports Intel PAC TOE10G-IP core supports Intel Programmable Acceleration Card (PAC). The performance demo is available on YouTube. TOE10G-IP + Intel PAC demo on YouTube Learn more about TOE10G-IP PCIe x16 Lanes Crossover adapter board for NVMe-IP PCIe x16 Lanes Crossover adapter board is released. It is for NVMe-IP core evaluation on high-end FPFA boards with high-speed NVMe SSD and for connecting with PCIe switch board. Learn more about AB Series.

Technical Updates UDP10G-IP Intel UDP10G-IP Presentation Rev1.1E - Updated Xilinx UDP10G-IP Datasheet Rev1.1 - Updated UDP10G-IP reference design manual Rev1.2 - Updated UDP10G-IP Demo Instruction Rev1.1 - Updated UDP10G-IP Presentation Rev1.1E - Updated NVMe-IP Intel exFAT IP for NVMe-IP Datasheet Rev1.1 - Updated exFAT IP for NVMe-IP reference design manual Rev1.1 - Updated exFAT IP for NVMe-IP Demo Instruction Rev1.1 - Updated Xilinx exFAT IP for NVMe-IP Datasheet Rev1.1 - Updated exFAT IP for NVMe-IP reference design manual Rev1.1 - Updated exFAT IP for NVMe-IP Demo Instruction Rev1.1 - Updated SATA-IP Intel exFAT IP for SATA-IP Datasheet Rev1.1 - Updated exFAT IP for SATA-IP reference design manual Rev1.1 - Updated exFAT IP for SATA-IP Demo Instruction Rev1.1 - Updated Xilinx exFAT IP for SATA-IP Datasheet Rev1.1 - Updated exFAT IP for SATA-IP reference design manual Rev1.1 - Updated exFAT IP for SATA-IP Demo Instruction Rev1.1 - Updated Privacy Protection Policy DesignGateway recognizes the importance of personal information protection, and strive to protect personal information. We absolutely do not transfer it to a third party. Distributed stop / Address change / Register If you do not wish us to send or if your E-mail address is changed, please contact following page. https://dgway.com/mailmaga_E.html Publisher DesignGateway Co., Ltd. https://dgway.com/ Mail：ip-sales@design-gateway.com | About Us| Contact| (c) 2019 Design Gateway Co., Ltd.