September 24, 2026

From 10G to Trade: Building High-Frequency Trading Systems Faster with AAT IP Suite

AAT IP Suite | Low-Latency FPGA Trading System for High-Frequency Trading In high-frequency trading, latency is a critical part of system design. Market data must be received, processed, and acted on within an extremely short and predictable time. Finologic’s AAT IP Suite provides a pre-integrated FPGA trading platform that combines low-latency networking, exchange-protocol processing, and trading-strategy integration. Traditional systems typically...
Categories Low Latency
September 16, 2026

From GPU to Edge FPGA: Balancing Image Quality and Resources for Super-Resolution on AMD Kria™ KV260

A super-resolution model can look excellent on a GPU. The real challenge starts when the same capability must operate inside a UAV, remote-sensing payload, or compact edge system. In these applications, high-resolution imagery is valuable, but the hardware budget is limited. Memory, power consumption, heat, processing latency, and board size all become part of the AI design. The best algorithm...
Categories FPGA & AI
September 8, 2026

Remote Sensing Image Enhancement for Next-Generation Satellite Services

Improving satellite image quality can follow two paths. The conventional path depends on new hardware investment, while the HybridATNet path enhances the value of images already captured by existing sensors. Developed from research at Chulalongkorn University, HybridATNet applies AI-based super-resolution to improve the clarity and usefulness of remote sensing imagery. 🔍 Overview For satellite service providers and remote sensing users,...
Categories FPGA & AI
September 4, 2026

Achieving Zero-CPU 10GbE TCP/UDP Offload on Agilex 9 Direct RF-Series

Modern radar, electronic warfare (EW), signal intelligence (SIGINT), and high-speed sensor systems generate enormous amounts of RF data. For systems using the Altera Agilex™ 9 Direct RF-Series, moving this data without creating a bottleneck is critical. Standard Software Stack Consumes valuable processor resources. Creates potential bottlenecks for high-speed RF data. Takes resources away from system control and app tasks. TOE10G-IP...
Categories Networking
September 1, 2026

AB21-E1PCI: Unlock Enterprise E1.S NVMe SSD Performance

Modern enterprise storage is moving beyond the traditional 2.5-inch U.2/U.3 SSD form factor. New EDSFF SSDs, especially the E1 form factor, are designed to support higher density, better airflow, and scalable storage performance for data-center and enterprise systems. However, evaluating an E1.S NVMe SSD on an FPGA platform is not always straightforward. Why? Because most FPGA evaluation boards provide PCIe...
Categories FPGA Technology/Storage
August 3, 2026

Accelerate NVMe Storage to 7,400 MB/s on Altera Agilex™ 5 FPGA without CPU and External Memory

High-speed edge data logging, radar signal processing, and autonomous vehicle telemetry demand sustained, multi-gigabyte-per-second storage throughput. Traditional CPU-based storage stacks can introduce OS kernel overhead, unpredictable latency, and additional power consumption. Design Gateway’s NVMe-IP addresses this bottleneck with a 100% hardware-offloaded PCIe Gen4 storage engine for the Altera Agilex™ 5 FPGA, achieving sustained transfer speeds above 7,400 MB/s without CPU...
Categories FPGA Technology/Storage
July 16, 2026

Proven 10G TCP & UDP Offload IP Cores for AMD FPGAs in Industrial, Medical, Test & Measurement Applications

With the growing demand for 10Gbps data rates, AMD FPGA boards have become the platform of choice for reliable, high-speed communication in industrial automation, medical imaging, and test & measurement systems. To fully maximize 10GbE bandwidth without burdening host resources, engineers are deploying 100% hardware-based IP cores directly onto their AMD hardware. By leveraging TCP for guaranteed data integrity and...
Categories Networking
July 14, 2026

Unlock 10GbE WireGuard VPN Performance with FPGA Hardware Acceleration

Secure networking has become a fundamental requirement for modern enterprise networks, industrial systems, cloud infrastructure, and remote-access applications. Among today’s VPN technologies, WireGuard has gained widespread adoption due to its simplicity, modern cryptography, and excellent performance. However, as network bandwidth increases to 10 Gigabit Ethernet and beyond, software-based WireGuard implementations are often limited by CPU processing power. Encryption and decryption...
Categories FPGA Technology/Networking/Security
June 10, 2026

Accelerate Your Network Applications to 10 Gbps on Edge device with SocketXpress

As edge computing applications scale, the demand for 10Gbps throughput is becoming the new standard. However, developers often hit a “CPU wall”—the Linux networking stack simply cannot keep up with 10Gbps speeds, often capping out around 3 Gbps while consuming most of the CPU. At Design Gateway, we’re introducing SocketXpress – a drop-in solution that accelerates TCP/IP applications from ~3...
Categories Networking
June 5, 2026

Sharpening the View from Orbit: AERU-NET’s Adaptive Edge Recovery Approach to Satellite Image Super-Resolution

Research from the CUEE MDAP Lab, published in IEEE Access in March 2025, introduces AERU-Net — a lightweight deep learning model that delivers state-of-the-art super-resolution for satellite and aerial imagery with a fraction of the computational cost of leading alternatives. Satellite and aerial images are essential tools for understanding our planet, but they come with an inherent limitation: resolution. atmospheric...
Categories FPGA & AI