From 10G to Trade: Building High-Frequency Trading Systems Faster with AAT IP Suite

In high-frequency trading, latency is a critical part of system design. Market data must be received, processed, and acted on within an extremely short and predictable time. Finologic’s AAT IP Suite provides a pre-integrated FPGA trading platform that combines low-latency networking, exchange-protocol processing, and trading-strategy integration.

Traditional systems typically pass market data through a software network stack before it reaches a CPU-based trading strategy. When an order is generated, it must travel back through the software networking path before reaching the exchange. For developers targeting lower and more deterministic latency, more of this processing can be moved into FPGA hardware, allowing you to start from a working foundation rather than building the entire system from scratch.

Watch the Full Demonstration

See the full demo: AAT IP Suite — Build Low-Latency FPGA Trading Systems Faster

However, the trading strategy itself is only one part of the complete system. A real FPGA trading platform also requires 10GbE networking, TCP/UDP processing, feed handling, packet recovery, snapshot synchronization, and Order Entry.

At first, an FPGA trading system may seem to be mainly about the trading strategy. But in reality, you also need 10G Ethernet, TCP/UDP, market-data processing, feed handling, recovery, snapshot synchronization, and order entry. As these functions are added, development and verification effort grows quickly.

⚙️ Start from a Working AAT Reference Design

The AAT IP Suite reference design integrates the major infrastructure needed for FPGA-based trading. At the application level, developers can implement their trading strategy using HLS with C/C++, reducing the amount of hand-written RTL required.

Underneath the strategy layer, the AAT platform provides:

The main benefit is simple: developers can focus more of their engineering effort on their own strategy instead of rebuilding the networking and exchange infrastructure.

🔧 Integrated Market-Data and Network Processing

The reference design includes the main building blocks required for exchange connectivity:

• Line Handler: Manages redundant A/B feeds and missing-packet recovery.
• Feed Handler: Extracts individual market-data messages for the trading logic.
• TCP Handler: Manages TCP communication seamlessly.
• Glimpse Handler: Handles snapshot initialization and synchronization with the live feed.

For network connectivity, Design Gateway’s low-latency networking technology connects the exchange-processing logic directly to 10GbE, including LL10GEMAC-IP. This gives developers a complete starting point rather than a collection of individual IP blocks that still need to be integrated and verified.

🎥 Live Trading Demonstration on Alveo X3522

In the demonstration, an AMD Alveo X3522 FPGA platform is connected to a market server emulator through two 10 Gigabit Ethernet links. The emulator provides snapshot and login services, live market-data replay, order reception, and real-time display of FPGA-generated orders.

On the FPGA side, the AAT console is used to configure and control the trading reference design. The system is initialized by configuring the network, requesting the order-book snapshot, and establishing the Order Entry session. Once initialization is complete, the FPGA is ready for the complete trading flow:

📈 Example FPGA Trading Strategy

To demonstrate the complete workflow, the reference design uses a simple two-moving-average crossover strategy. The Fast SMA uses the latest 5 trade prices, while the Slow SMA uses the latest 20 prices.

• When the Fast SMA crosses above the Slow SMA, the FPGA generates a BUY order.
• When the Fast SMA crosses below the Slow SMA, it generates a SELL order.

The purpose of this example is not to present a production trading strategy, but to clearly demonstrate how incoming market data can flow directly into FPGA logic and trigger an Order Entry transaction during live streaming and real-time calculation.

✅ Focus on Your Trading Strategy

Developing an FPGA trading platform involves far more than implementing the trading algorithm itself. Networking, TCP/UDP processing, exchange protocols, feed recovery, snapshot synchronization, and Order Entry must all work together before the strategy can operate.

The AAT IP Suite provides these functions as an integrated FPGA reference platform, allowing developers to start from a working trading environment and concentrate on their own trading logic and application requirements.