From GPU to Edge FPGA: Balancing Image Quality and Resources for Super-Resolution on AMD Kria™ KV260
A super-resolution model can look excellent on a GPU. The real challenge starts when the same capability must operate inside a UAV, remote-sensing payload, or compact edge system.
In these applications, high-resolution imagery is valuable, but the hardware budget is limited. Memory, power consumption, heat, processing latency, and board size all become part of the AI design. The best algorithm is therefore not always the model with the highest image-quality score. The practical target is the model that delivers enough image quality within the available edge resources.
The Edge-AI Problem: High Image Quality Under a Small Hardware Budget
Remote-sensing systems must process imagery close to where it is captured. However, bringing AI to the edge means leaving power-hungry GPUs behind and working within strict hardware constraints.
The Deployment Constraint
- UAVs & field cameras cannot carry GPU workstations.
- Tighter power, thermal, and memory budgets.
- Need for real-time edge processing.
The AMD Kria™ Solution
- Combines processing resources & programmable logic.
- Compact platform with AI acceleration flow.
- Adapts the AI model to the equipment constraints.
From AERU-Net Research to a Complete Edge Deployment Flow
Developed by MDAP (Chulalongkorn University), this workflow transitions the AERU-Net super-resolution architecture from GPU-based research to a real FPGA edge hardware deployment.
The system is optimized for quantization-friendly operation, supporting both ×2 and ×4 super-resolution for remote-sensing imagery.
1
AERU-Net
Algorithm
Algorithm
2
GPU Training
FP32 Baseline
FP32 Baseline
3
Model & Operator
Optimization
Optimization
4
Quantization
Aware Training
Aware Training
5
AMD Kria™ KV260
Deployment
Deployment
Two Design Boundaries: Quality vs. Efficiency
In embedded AI, every design is a balance between image fidelity and hardware resources. The research establishes two clear boundaries: an FP32 maximum-quality reference and an INT8 resource-efficient deployment. The ideal product sits somewhere between these points.
Trade-off explorer
Choose a scale factor to compare the two borders.
Minimum resource
INT8 on AMD Kria™ DPU
29.72 dB
SSIM 0.8698 · 0.27 MB
Maximum quality
FP32 full-precision reference
32.56 dB
SSIM 0.9332 · 1.10 MB
Minimum resource
INT8 on AMD Kria™ DPU
24.59 dB
SSIM 0.6856 · 0.30 MB
Maximum quality
FP32 full-precision reference
26.69 dB
SSIM 0.7939 · 1.18 MB
Visual Proof (2X & 4X Upscaling): Ground truth (Left), Low resolution (Middle), and Our Optimized KV260 Result (Right)
Visual Proof (Upscaling): Demonstrating the actual image reconstruction quality achieved by our optimized INT8 model running directly on the AMD Kria™ KV260 edge platform.
Finding the Sweet Spot: Customizing for Your System
For real-world deployments—especially in UAVs and remote-sensing equipment—the ideal AI solution must balance image fidelity against strict hardware limits. Design Gateway and MDAP can use your requirements as a starting point to engineer a customized operating point. Here is what we can tune:
Performance Targets
- Image Quality Define the acceptable reconstruction baseline.
- Upscaling Factor Start from ×2 or ×4 based on the application use case.
- Frame Rate Balance real-time throughput vs. model complexity.
Hardware Limits
- Memory Budget Tune the model to fit available on-chip and external memory.
- Power & Thermal Optimize for continuously operated edge equipment.
- Kria™ Platform Adapt deployment to the specific hardware I/O environment.
Model Adaptation
- Quantization Select the precision strategy (e.g., INT8) according to resource levels.
- Custom Data Retrain or fine-tune using imagery from your operating environment.
Learn More About AERU-Net & Kria™ Edge AI
AERU-Net Algorithm Overview — Design Gateway Blog
CUEE MDAP Research Unit
MDAP × Design Gateway Partnership
Full Research Paper: Edge AI Super-Resolution (IEEE)
Note: Note: Performance metrics shown are based on specific research configurations using the AMD Kria™ KV260. As we move from research to real FPGA edge hardware, commercial results will vary. To evaluate the model or optimize the solution for your specific constraints—such as image quality, frame rate, memory budget, and target platform—please contact Design Gateway.
CUEE MDAP Research
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Design Gateway
From Concept to Real-World Edge Hardware
Bringing AERU-Net from an AI concept to a commercial FPGA deployment requires balancing image fidelity against strict hardware limits. Tell us your constraints, and we will help engineer the right design.
