Design Gateway Hot! News
August 2021 (1)
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View on Web Design Gateway Hot! News August 2021 (1) |
| 100G/40G/25G/10G/1GbE TCP/IP Stack Implementation by All HW Logic without CPU! |
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TOE-IP core series (TCP/IP Off-loading Engine) is the full hardware TCP/IP protocol stack engine which proven by many of our customer projects. Reduce network subsystem cost when using TOE IP together with our EMAC Core. Best fit for non-CPU and low latency application requirements. TOE IP core series includes free reference design to shorten development time and cost. | |
| Learn more about TOExxG IP for Xilinx | Learn more about TOExxG IP for Intel |
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| TOExxG IP Presentation for Xilinx | TOExxG IP Presentation for Intel |
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| Practical Reference Designs |
| Standard Reference design |
FTP Server demo Reference design |
Multi-session Reference design |
Achieve best performance with a single session. Support many Intel and Xilinx FPGA boards such as,.
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Leveraging TOE-IP with NVMe-IP or SATA-IP with exFAT-IP to build FTP Server system without OS required and delivers full Gigabit speed with no compromise. The unique solution for file transfer over network for the speed-critical application. | Support up to 8 sessions by instantiating 8 TOE10G-IP cores in the FPGA. |
| Free Reference Design with IP core license Shorten development time for 1~2 months Obtain Reference Design Document from Website |
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