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[ N E W R E L E A S E ] Highly optimized 25G EMAC/PCS + RS-FEC IP core Achieving high & reliable data rate over 25G Ethernet |
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Learn more The new release 25G EMAC IP Core with highly optimized Physical Coding Layer (PCS) and Reed Solomon Forward Error Correction (RS-FEC) for 25G Ethernet |
The 25G EMAC/PCS + RS-FEC IP core provides a comprehensive implementation of the physical layer, including
the Ethernet MAC layer, Physical Coding sublayer (PCS), and RS-FEC sublayer.
The incorporation of RS-FEC in the system significantly enhances data reliability
and connection stability, making it an ideal option for applications that
prioritize data reliability. The demo is ready available for IP core evaluation. This demo aims to provide a simple yet comprehensive demonstration of the capabilities of The 25G EMAC/PCS + RS-FEC IP, connected to the Xilinx Transceiver, which enables the physical and medium of the 25G Ethernet system. Learn more |
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KEY FEATURES
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25GEMAC/PCS+RS-FEC IP YouTube Videos |
CPU less All Pure Hardware Logic TOE-IP & UDP-IP core series |
TOE-IP for Intel | TOE-IP for Xilinx | ||||
UDP-IP for Intel | UDP-IP for Xilinx | ||||
We are currently developing TOE200G-IP / UDP200G-IP!! |
Events |
IMAGE SENSING SHOW 2023 Date : Jun 14-16, 2023 Venue : Pacifico Yokohama, Japan Outline Interop Tokyo 2023 Date : Jun 14-16, 2023 Venue : MAKUHARI MESSE, Japan Outline Manufacturing World 2023 AIoTex (Industrial AI/IoT Expo Expo) Date : Jun 21-23, 2023 Venue : Tokyo Big Sight, Japan Outline NEPCON THAILAND 2023 Date : Jun 21-24, 2023 Venue : BITEC, BANGKOK Outline |
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