The Expert of IP Core & Embedded

QUIC IP core ┃TOE IP core series ┃UDP IP core series ┃Low Latency Networking IP core series

Design Gateway Co., Ltd. is Altera Design Solutions Network Platinum partner, provider of Networking IP Cores. We provide high performance and low resources usage solutions with comprehensive reference design and demo ready for real board evaluation to support customers. Gigabit IP core Brochure IP cores Brochure for Altera | IP核 Brochure (中文)

QUIC IP core

CPU-less QUIC Offload IP core for FPGA Acceleration

QUIC Client 10Gbps IP Core (QUIC10GC-IP) is engineered from the ground up to simplify the QUIC protocol with TLS 1.3 security into pure hardware logic for FPGA-based client applications. This IP core fully offloads the CPU from handling TLS 1.3 handshakes, encrypting/decrypting payload data, and managing both QUIC and UDP/IP layers within Single IP Core. Get ready to leverage the next generation of network protocols with the QUIC10GC-IP core today! Learn More about QUIC IP core

In today’s digital landscape, traditional TCP/IP protocols struggle with head-of-line blocking, causing data delays and inefficiencies. Our QUIC10GC IP Core overcomes these challenges by leveraging the QUIC protocol, ensuring uninterrupted data transmission and enhanced network efficiency. It handles security tasks, congestion control, and data recovery without needing a CPU, maintaining high throughput. QUIC10GC IP is the ideal solution for creating a seamless, secure, and high-performance network. Experience the future of your networking applications with QUIC10GC IP, where speed, security, and reliability converge. Learn More about QUIC IP core

TOE IP core series

Up to 200GbEthernet TCP/IP Stack Implementation By All HW Logic without CPU!

200G/100G/40G/25G/10G/1Gbit TCP Off-loading Engine IP core is the pure hardware logic solution, TCP/IP protocol is handled 100% by IP core. Enabling TCP network communication to FPGA system without need CPU/OS or external memory. We provides both TCP offload engine IP for different Ethernet speed up to 200Gbps. Learn More about TOE IP core series

UDP IP core series

100G/40G/25G/10G/1GbE UDP Implementation By All HW Logic without CPU!

UDP 100G/40G/25G/10G/1G Off-loading Engine IP core is the epochal solution implemented by hardware logic only without CPU. Learn More about UDP IP core series

Low Latency Networking IP core series

Low Latency Networking IPs for Fintech
(LL10GEMAC-IP / TOE10GLL-IP / LL UDP10GRx-IP)

Design Gateway’s Low Latency (LL) Networking IP is designed from the ground up for very low latency requirements. Especially, FinTech applications such as high-frequency trading (HFT), high speed trading (HST), Market Data Processing and Tick-to-Trade (T2T) systems. We can provide total solutions for low latency Networking IP cores and FPGA logic customization for application specific requirements.
Learn more about Low Latency Networking IP core series