The Expert of IP Core & Embedded

At Design Gateway, we specialize in developing application-specific FPGA IP cores that empower mission-critical systems across industries such as aerospace, automotive, finance, medical, industrial automation, and scientific research. Our solutions are built to deliver ultra-low latency, high throughput, and maximum resource efficiency, ensuring optimal performance in real-time and embedded environments.

Our engineering philosophy centers on hardware-first innovation - designing IP cores from the ground up to operate independently of CPUs and operating systems. This results in faster processing, simplified architecture, and reduced power and cost overhead - ideal for applications where reliability, determinism, and speed are non-negotiable.

Experience breakthrough storage performance with our NVMeG4-IP on Zynq UltraScale+ MPSoC running PetaLinux - achieving up to 7 GB/s data transfer using a fully FPGA-optimized PCIe Gen4 Soft IP and dual-channel DMA engine. Unlike conventional solutions limited by PCIe Hard IP and software overhead, our design delivers maximized throughput, and seamless integration with embedded Linux systems. This high-efficiency architecture is ideal for cutting-edge applications in AI, autonomous systems, and industrial data logging. Contact Us

Core Technologies

• NVMeG4-IP (NVMe IP with PCIe Gen4 Soft IP) Learn more about NVMeG4-IP (AMD)
• Customized NVMe driver for PetaLinux Peta Linux reference design Document

Key benefits

• Very high performance, maximizing throughput
• Seamless integration of the hardware system with PetaLinux, eliminating bottlenecks

Blog & Video

Unlock the full potential of high-speed storage with our flagship NVMe-IP for Gen5 with RAID0 x4, delivering blazing-fast 40GB/s write performance on Altera Agilex 7 I-series FPGA. Engineered for extreme data throughput, this cutting-edge solution leverages four Gen5 NVMe SSDs in parallel to accelerate real-time applications such as 16K video recording, 400GbE network capture, and AI/edge computing. Our RAID0 reference design provides seamless integration with FPGA through plug-and-play compatibility using the AB19 M.2 adapter board, this IP core maximizes bandwidth while minimizing latency. Contact Us

Core Technologies

• NVMe Gen5 IP Learn more about NVMe-IP (Altera)
• RAID0 controller from pure hardware logic 4-ch RAID0 NVMe-IP for Gen5 reference design Document
• AB19-M2PCI for 4 NVMe SSDs connection

Key benefits

• High-throughput NVMe host controller via pure hardware logic, without CPU, DDR, and OS
• Achieves up to 40GB/s storage performance at PCIe Gen5 speed
• RAID0 controller included in VHDL source code after purchase
• Ready-to-use PCIe-to-M.2 adapter (AB19), supporting up to 4 SSDs

Blog & Video

Achieve breakthrough sustained performance with our NVMe + DDR reference design - designed for demanding consistent ultra-high-speed data access in mission-critical applications such as 8K video, radar systems, aerospace, and LiDAR. By combining the power of NVMe with on-FPGA DDR memory buffering, this solution eliminates host bottlenecks, enabling seamless, long-duration data transfers at stable speeds. Built entirely on FPGA hardware, it ensures real-time responsiveness, and maximum reliability - no CPU, no OS required. Contact Us

Core Technologies

• NVMe host controller on PCIe Gen3/4/5 speed via NVMe-IP Learn more about NVMe-IP (AMD)
• User's data buffering via on-FPGA DDR NVMe-IP DDR reference design Document

Key benefits

• High throughput NVMe host controller via pure hardware logic, without CPU and OS
• Deliver steady transfer speed for NVMe SSD access
• Include FPGA's DDR controller in VHDL source code after purchase

Video

Unlock the full potential of high-speed storage access using Design Gateway’s NVMe-IP Core with PCIe switch support on Altera and AMD FPGA platforms. This solution enables simultaneous communication with multiple NVMe SSDs through a single PCIe interface, delivering ultra-low latency, high throughput, and scalable storage architecture ideal for real-time applications, data acquisition systems, and AI/ML workloads. Seamlessly integrated with industry-standard PCIe switches, it empowers developers to build powerful, flexible, and cost-effective storage systems using FPGAs.Contact Us

Core Technologies

• NVMe host controller with PCIe switch support via NVMeSW-IP
  • About NVMe-IP (AMD) | About NVMe-IP (Altera)
  • NVMe IP for PCIe switch Data Sheet (AMD) | NVMe IP for PCIe switch Data Sheet (Altera)

Key benefits

• High throughput NVMe host controller via pure hardware logic, without CPU, DDR, and OS
• Enable signle host controller to connect to multiple NVMe SSD
• Effectively utilize PCIe Hard IP on FPGA, allowing a Hard IP to communicate with multiple NVMe SSDs.

Blog & Video

Ultra-Fast Remote Storage with FPGA-Based FTP Server Powered by exFAT2 IP + muNVMe IP + TOE100G IP on VCK190

Experience a new era of high-speed data management with our advanced FTP Server solution, seamlessly integrating exFAT2-IP, muNVMe-IP Gen4, and TOE100G-IP on AMD's flagship VCK190 board. This powerful combination enables simultaneous data logging and real-time monitoring at over 5,400 MB/s upload and 4,100 MB/s download speeds - eliminating manual SSD handling and system downtime. Ideal for engineers seeking reliable storage over 100G Ethernet, our solution ensures efficient, uninterrupted workflows in data-intensive applications. Read More

Core Technologies

• NVMe storage access with simultaneous write/read via muNVMe-IP
  • About muNVMe-IP (AMD) | About muNVMe-IP (Altera)
• File System transfer via exFAT2-IP exFAT IP for Gen4 Data Sheet (AMD)
• TCP/IP communication over Ethernet via TOE100G-IP
  • About TOE100G-IP (AMD) | About TOE100G-IP (Altera)
• FTP Server by muNVMe-IP Reference Design Document

Key benefits

• Complete system for continuous logging with real-time monitoring without storage removal
• Less maintenance and complexity with OS-Free FTP Server
• Ease of data management via file system
• High throughput in both storage access and networking via hardware logic

Blog & Video

• FPGA Data Logging System With Live FTP Monitoring
  YouTube | Blog
• Live Demo: FPGA-Based FTP Server Delivers 5400+ MB/s Speed
  YouTube | Blog

OS-Free Storage Access over 10G / 25G Ethernet

Accelerate your data infrastructure with our FPGA-based FTP Server solution, integrating exFAT File System, high-performance NVMe-IP, and low-latency TOE10G/25G IP cores. This powerful combination enables seamless access to NVMe SSDs using standard exFAT format while achieving blazing-fast data transfers over 10G/25G Ethernet. Ideal for AI, HPC, and data acquisition systems, the solution runs entirely on FPGA logic - no CPU or OS required - ensuring real-time performance with minimal resource usage. Discover how to revolutionize your storage and networking architecture with FPGA. Contact Us

Core Technologies

• NVMe storage access via NVMe-IP
  • About NVMe-IP (AMD) | About NVMe-IP (Altera)
• File System transfer via exFAT-IP
  • exFAT IP Data Sheet (AMD) | exFAT IP Data Sheet (Altera)
• TCP/IP communication over Ethernet via TOE10G/25G-IP
  • About TOE-IP (AMD) | About TOE-IP (Altera)
• FTP 25G Server Demo reference design Document

Key benefits

• Complete system for data logging and monitoring without storage removal
• Less maintenance and complexity with OS-Free FTP Server
• Ease of data management via file system
• High throughput in both storage access and networking via hardware logic

Unlock next-generation cloud storage performance with our FPGA-based NVMeTCP25G-IP Core, seamlessly integrated with DYNANIC's high-performance DMA engine. This powerful solution delivers ultra-low latency and high-throughput NVMe over TCP communication - without relying on CPU or external memory - making it ideal for scalable, energy-efficient cloud infrastructure. By offloading intensive storage protocols directly to FPGA hardware, your system gains faster data access, reduced CPU workload, and optimized power consumption. Whether you're building cutting-edge storage systems or optimizing virtualized environments, this IP core is your key to unlocking true performance at 25GbE speed. Contact Us

Core Technologies

• hardware accelerator for storage access over network: NVMe/TCP IP core
  • About NVMeTCP-IP (AMD) | About NVMeTCP-IP (Altera)
• Complete hardware platform: DYNANIC DMA driver & hardware engine, supporting virtualized environments NVMeTCP-IP Cloud Accelerator Demo Instruction

Key benefits

• Solution ready for modern cloud infrastructure with hypervision & virtualization support
• Low power consumption from FPGA-base
• High scalability with cost effective from NVMe/TCP
• Fully offload CPU from NVMe & Networking via FPGA IP Core
• Complete platform for hardware accelerator from DYNANIC, seamlessly integrate accelarator with host CPU system

Blog & Video

• Accelerating Cloud Storage with FPGA-Based NVMe over TCP
  YouTube | Blog
• Live Demo: FPGA-Accelerated Cloud Storage with NVMe/TCP
  YouTube | Blog

AAT-QDMA on AMD X3 card

Unlock unprecedented speed and precision in your trading strategy with AAT-QDMA on AMD Alveo X3522PV, a cutting-edge FPGA solution re-engineered by Design Gateway for ultra-low latency algorithmic trading. Built on the proven Accelerated Algorithmic Trading (AAT) framework and optimized with DG’s LL10G EMAC IP Core, this reference design achieves sub-microsecond latency by offloading the entire trading pipeline - market data capture, decision logic, and order transmission - directly onto hardware. Empower your HFT infrastructure with real-time UDP and TCP processing via QDMA and PCIe Gen4 interface, accelerating performance beyond conventional NIC-based systems. Learn More

Core Technologies

• Low-latency networking by hardware: Low-latency DG EMAC IP
  • About Low Latency Networking IP cores for Fintech Application
• HLS-based design on Vivado platform
• AAT Framework as engineering reference
  • LL10GEMAC-IP with AAT QDMA Demo reference design Document

Key benefits

• Adopted and proven on SET (The Stock Exchange of Thailand) Read More
• Fast adaptation to the market with HLS-based system
• Portable to any FPGAs
• Ready-to-use trading system: originated from AMD/ re-engineered by DG

Blog & Video

• Accelerated Algorithmic Trading (AAT) Solutions Page
• Accelerated Algorithmic Trading on Alveo X3522PV: The Ultimate HFT Solution
  YouTube | Blog

TOE100G-IP with Vitis platform on Alveo Accelerator Card

Unlock the full potential of ultra-high-speed networking with the TOE100G-IP Core on AMD’s Alveo Accelerator Card, powered by the Vitis platform. This turnkey FPGA solution delivers true 100G TCP Offload, eliminating CPU bottlenecks and maximizing Ethernet throughput for demanding real-time applications in AI, data centers, finance, and edge computing. By offloading the entire TCP/IP stack to FPGA hardware, users can achieve peak performance up to 12.3 GB/s per direction and ultra-low latency communication, ideal for high-volume, low-latency environments. Fully compatible with Vitis design flow, integration is faster and more flexible than ever. Read More

Core Technologies

• Networking via TOE100G-IP About TOE100G-IP (AMD)
• Vitis framework with complete DMA platform and HLS-tool environment
  • TOE100G-IP on Alveo card reference design Document

Key benefits

• Achieve 100GbE line-rate throughput with hardware-based TCP/IP
• Eliminating network workload from CPU with FPGA-based TCP/IP offload engine
• Complete and fast time-to-Integration accelarator platform on Vitis flow
• System flexibility and fast adaptation from HLS-based platform (Vitis)

Blog & Video

• Full 100G TCP Offload for AMD Alveo Accelerator Card | TOE100G-IP Core
  YouTube | Blog

TOE100G-IP with Silicom platform

Experience next-generation networking performance with our FPGA-based TOE100G-IP integrated on Silicom's cutting-edge PacketMover platform. This powerful SmartNIC solution delivers full TCP/IP offload at 100G line rate - achieving up to 12 GB/s throughput per direction - without burdening the CPU or external memory. Optimized for building high-speed data centers, AI, and satellite communication systems, the TOE100G-IP with Silicom FPGA card enables ultra-low latency, deterministic packet handling, and efficient resource utilization. Whether you're designing scalable infrastructure or accelerating critical workloads, this solution ensures seamless integration, sustainable performance, and flexibility for customization. Read More

Core Technologies

• Networking via TOE100G-IP About TOE100G-IP (AMD)
• Silicom framework with complete SmartNIC platform
  • TOE100G-IP on Silicom NIC reference design Document
• Hybrid usgae architecture: high-speed FPGA lanes + general NIC on the same card

Key benefits

• Achieve 12 GB/s throughput with hardware-based TCP/IP
• Eliminating network workload from CPU with FPGA-based TCP/IP offload engine
• Proven and complete accelarator platform from Silicom, while maintaing general NIC capability
  • Host CPU is able to assign high speed port for FPGA offloading lane
  • Host CPU is able to deploy general network application or lower speed port on NIC lane

Blog & Video

• FPGA-based SmartNIC for high-performance TCP/IP application
  YouTube | Blog

• Silicom's PacketMover Performance Demo on fb2CG@KU15P Kintex UltraScale+ FPGA Card with TOE100G-IP
  YouTube | Blog

AES-GCM & TLS 1.3 on KR260

Empower your edge computing applications with robust and efficient security by leveraging AES-GCM encryption and TLS 1.3 protocol on the AMD Kria KR260 platform. This FPGA-accelerated solution enables ultra-low latency and high-throughput secure data transfer from edge devices to the cloud, ideal for industrial automation, smart city infrastructure, and next-gen IoT systems. With Design Gateway’s IP cores optimized for KR260, you can offload cryptographic processing from the CPU, reduce bottlenecks, and ensure data confidentiality without compromising performance. Read More

Core Technologies

• hardware accelerator for security: TLS1.3 10G Client IP & AES-GCM IP
  • TLS1.3-IP on Kria KR260 reference design Document
  • About AES256GCM IP & TLS1.3 IP
• hardware accelerator for networking: Low-latency TOE IP & EMAC IP
• Integrated with standard Ubuntu Linux GitHub

Key benefits

• Removes CPU Bottlenecks: Offloads cryptographic and TCP/IP processing to FPGA, reducing CPU load and latency
• Linux-Friendly Architecture: Hardware logic integrates smoothly with standard Linux apps like OpenSSL and Lynx
• Turnkey Edge Platform: Complete security-accelerated system on AMD Kria SOM for IoT, industrial, and smart city use cases

Blog & Video

• Accelerate high-speed secure connection on your KR260 via TLS10GC-IP
  YouTube | Blog

[SocketXpress]

Achieve the full potential of 10G Ethernet performance with Design Gateway’s SocketXpress - a hardware-accelerated networking solution that brings FPGA power directly to Linux applications. By seamlessly redirecting standard socket calls to FPGA-based TCP Offload Engine (TOE) hardware using LD_PRELOAD, DG Socket achieves nearly 10G throughput while significantly reducing CPU utilization, making it ideal for edge devices where resource efficiency and performance are critical. This solution enables developers to accelerate network-heavy applications without modifying existing software. Contact Us

Core Technologies

• Reference Design: Demonstrated on the AMD Kria KR260 platform
  • SocketXpress with TCP/IP accelerator Reference Design Document for KR260
• SocketXpress Library: Transparent LD_PRELOAD integration with Linux applications
• Compatibility: Works with standard TCP/IP applications and the Linux network stack
• Hardware for Networking: Low-latency TOE-IP & EMAC-IP
  • About Low-latency TOE10GLL-IP (AMD)
  • About Low-latency 10GEMAC-IP (AMD)

Key benefits

• Boost Throughput: Achieves up to 9.4 Gbps TCP transfer speed on 10G Ethernet
• Reduce CPU Load: Offloads TCP/IP processing from software to FPGA hardware
• Software-Compatible: Works with existing Linux socket applications via LD_PRELOAD

Blog & Video