The WireGuard-IP core implements the complete WireGuard VPN protocol entirely in hardware, delivering full line-rate encryption and decryption with no CPU load and no external memory required. It eliminates CPU overhead by performing the full Noise handshake, ChaCha20-Poly1305 encryption, X25519 key exchange, and BLAKE2s key derivation entirely in programmable logic. Proven with real WireGuard software interoperability testing on FPGA evaluation boards.
Key Features
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| Support Devices | Sulfur Agilex™ 5 E-series, Arria 10 SX | ||||
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| IP core | Datasheet | Reference Design Document | Demo Instruction | Free Evaluation Demo file |
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| WireGuard1G-IP | Sulfur Agilex™ 5 E-series Arria 10 SX | ||||