Design Gateway offers FPGA IP Cores across a wide range of applications. To help marketing, business development, and engineering teams quickly find the right fit, we organized our reference designs into 5 market segments on a single Solutions page — accessible from the top navigation drop-down.
100G Ethernet packet capture, RF signal recording, CT scanner imaging pipelines, and HPC cluster streaming — sustained multi-GB/s write to NVMe SSD with zero CPU involvement.
From embedded Linux acceleration to Gen5 RAID0 at 40,000 MB/s — FPGA-based NVMe IP removes CPU bottlenecks and pushes NVMe SSD to its physical limit.
FPGA SmartNICs and TCP offload engines that move packets at 100G line rate with zero CPU load — for AI clusters, data centers, and edge deployments.
NVMe over TCP initiator and hardware-accelerated socket libraries that give cloud and edge systems fast, CPU-free access to remote NVMe storage over standard Ethernet.
Sub-microsecond algorithmic trading on AMD Alveo — market data via UDP, order execution via TCP, with on-card or host-side pricing engine options. Market-proven at Thailand SET.