SATA IP core provides link layer to implement SATA channel to Intel FPGAs.
It supports SATA-III (6Gbps) and matches with SATA-III SSDs. It can connect with SSD/HDD without PHY
chip. You can develop your product in a short period because the IP core
product includes the reference design with source code designed for Intel®
FPGA development kit.
The best performance
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SATA access from Linux |
FPGA-PC data exchange |
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HCTL-IP (SATA Host controller IP) |
AHCI-IP | exFAT-IP FAT32-IP |
Whole control for SATA-IP with pure hard-wired logic, and can reduce CPU as well as can provide the best performance and minimum latency | AHCI adapter function that is necessary to access from LinuxOS via AHCI device driver. For SOC devices | Manage exFAT/FAT32 file system by pure hard-wired logic together with HCTL-IP and SATA-IP. |
Learn more: SATA-IP Related Products Selection Guide |
Document name | Update (Revision) |
SATA-IP core Leaflet | Rev2.0 |
SATA-IP core Presentation | Rev1.8E |
SATA-IP core RAID prototype system introduction | Rev1.3E |
SATA-IP Related Products Selection Guide | Rev1.2E |
Demo Board (AB09-FMCRAID) Manual | Rev1.2 |
Demo Board (AB11-HSMCSATA) Manual | Rev1.0 |
Demo Board (AB12-HSMCRAID) Manual | Rev1.0 |
Document | Arria® 10 SX Cyclone®10 GX Reflex Alaric |
Stratix® V GX Arria® V ST/GX Cyclone® V SX |
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HOST Controller IP core (HCTL IP) |
HCTL IP Datasheet | Rev1.2 | |
Reference Design Document | Rev1.2 | ||
Demo Instruction Document | Rev1.2 | ||
Evaluation sof file Registration Form |
Arria 10 SX Reflex Alaric |
Arria V GX | |
8ch RAID0 by HCTL IP | 8ch RAID0 Reference Design Document | Rev1.0 | |
8ch RAID0 Demo Instruction Document | Rev1.0 | Rev1.1 | |
Evaluation sof file Registration Form |
Arria 10 SX | Stratix V GX | |
4ch RAID0 by HCTL IP | 4ch RAID0 Reference Design Document | Rev1.2 | |
4ch RAID0 Demo Instruction Document | Rev1.1 | ||
Evaluation sof file Registration Form |
Arria 10 SX Reflex Alaric |
Arria V GX | |
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exFAT for Host IP | exFAT IP Datasheet | Rev1.0 | |
exFAT IP Reference Design Document | Rev1.0 | ||
exFAT IP Demo Instruction Document | Rev1.0 | ||
Evaluation sof file Registration Form |
Arria 10 SX Cyclone 10 GX |
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FAT32 for Host IP | FAT32 IP Datasheet | Rev1.0 | |
FAT32 IP Reference Design Document | Rev1.0 | ||
FAT32 IP Demo Instruction Document | Rev1.0 | ||
Evaluation sof file Registration Form |
Arria 10 SX | ||
AHCI | SATA+AHCI IP Datasheet | Rev1.2 | |
AHCI Reference Design Document | Rev1.3 | ||
Demo Instruction Document | Rev1.2 | ||
Evaluation sof file Registration Form |
Arria 10 SX (61.2MB) |
Cyclone V SX (57.4MB) Arria V ST (57.7MB) |
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Document | Arria® 10 SX Cyclone®10 GX Reflex Alaric |
Stratix® V GX Arria® V ST/GX Cyclone® V SX |
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Datasheet | Rev1.5 | ||
Host | Reference Design Document | Rev1.4 | |
Demo Instruction Document | Rev2.2 | ||
Evaluation sof file Registration Form |
Arria 10 SX | Stratix V GX Cyclone V SX Arria V ST Arria V GX |
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RAID | 4ch RAID Reference Design Document | - | Rev1.0 (ST5) Rev1.1(AR5) |
4ch RAID Demo Instruction Document | - | Rev1.0 (ST5) Rev1.1 (AR5) |
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Evaluation sof file Registration Form |
- | Stratix V GX Arria V GX |
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Document | Arria® 10 SX Cyclone®10 GX Reflex Alaric |
Stratix® V GX Arria® V ST/GX Cyclone® V SX |
Accessories for evaluation | Description | Purchasing |
FMC-SATA(10ch) adapter board for SATA-IP with RAID evaluation. Product page Download manual |
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HSMC-SATA(8ch) adaptor board for Intel® FPGA development kits | ![]() Purchase |
![]() 1to3 HDD Duplicator Application on Stratix® IV GX Video Clip on youtube |