The Expert of IP Core & Embedded

• NVMe host controller for access one NVMe SSD without CPU and external memory
• Support up to 32 Write or Read commands for 4 Kbyte random access
• High Performance and Compact resource
  • Write=592KIOPs, Read=226KIOPs (measured by KCU105)
  • Resource usage: 716CLB, Memory=34BRAMTile
• Support single command for Identify, Shutdown, SMART and Flush
• Operating the same command at a time, not supporting Write and Read command in the same queue
• Include 128 Kbyte RAM to be data buffer
• Simple user interface by using data streaming interface
• Supported NVMe device
  • Base Class Code:01h (mass storage), Sub Class Code:08h (Non-volatile), Programming Interface:02h (NVMHCI)
  • MPSMIN (Memory Page Size Minimum): 0 (4Kbyte)
  • MDTS (Maximum Data Transfer Size): At least 5 (128 Kbyte) or 0 (no limitation)
  • LBA unit: 512 byte
• User clock frequency must be more than or equal to PCIe clock (250MHz for Gen3)
• Operating with Integrated Block for PCI Express from Xilinx by using 4-lane PCIe Gen3 (128-bit bus interface)

• Reference design with AB18-PCIeX16 / AB17-M2FMC adapter board available on Xilinx FPGA boards
  Available on Mouser
• Customized service for following features
  • Support Write and Read command in the same queue
  • Additional NVMe commands
  • RAM size modification, more than 32 commands or more than 4 Kbyte data size
  • RAM type modification, URAM

Block diagram

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