The Expert of IP Core & Embedded

raNVMe-IP (Random Access NVMe IP) is the new generation of NVMe-IP series which is intentionally optimized for random access and low latency time. raNVMe-IP can achieve more than 500K IOPS for random write access on high performance NVMe SSD without CPU intervention. Ideal for the application such as Database Search Application which requires multiple access to NVMe SSD with best performance.

Features

• NVMe host controller for access one NVMe SSD without CPU and external memory
• Support up to 32 Write or Read commands for 4 Kbyte random access
• High Performance and Compact resource
  • Write=592KIOPs, Read=226KIOPs (measured by KCU105)
  • Resource usage: 716CLB, Memory=34BRAMTile
• Support single command for Identify, Shutdown, SMART and Flush
• Operating the same command at a time, not supporting Write and Read command in the same queue
• Include 128 Kbyte RAM to be data buffer
• Simple user interface by using data streaming interface
• Supported NVMe device
  • Base Class Code:01h (mass storage), Sub Class Code:08h (Non-volatile), Programming Interface:02h (NVMHCI)
  • MPSMIN (Memory Page Size Minimum): 0 (4Kbyte)
  • MDTS (Maximum Data Transfer Size): At least 5 (128 Kbyte) or 0 (no limitation)
  • LBA unit: 512 byte
• User clock frequency must be more than or equal to PCIe clock (250MHz for Gen3)
• Operating with Integrated Block for PCI Express from Xilinx by using 4-lane PCIe Gen3 (128-bit bus interface)
• Available reference design on Xilinx FPGA board with AB18-PCIeX16 or AB16-PCIeXOVR adapter board Available on Mouser
• Customized service for following features
  • Support Write and Read command in the same queue
  • Additional NVMe commands
  • RAM size modification, more than 32 commands or more than 4 Kbyte data size
  • RAM type modification, URAM

Block diagram

Document download

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Common Documents

Document name	Update (Revision)
NVMe-IP core Brochure	Rev2.6EX
NVMe-IP核	Rev2.4CX (中文)
raNVMe-IP core Presentation	Rev1.0XE
Introduction Video

Technical Documents

Support Devices	Zynq UltraScale+, Virtex UltraScale+, Kintex UltraScale KCU105
IP core	Datasheet	Reference Design Document	Demo Instruction Document	FPGA Board Setup	Evaluation demo file * ask password	Demo Video
raNVMe-IP	Rev1.2	Rev1.2	Rev1.2	Rev4.0	KCU105 ZCU106
Data Stream Demo	-	Rev1.1	Rev1.1	Rev4.0	KCU105 ZCU106
Multiple User Demo	-	Rev1.0	Rev1.0	Rev4.0	KCU105 ZCU106

Accessories for evaluation

Accessories for evaluation	Description
AB16-PCIeXOVR	PCIe Cross Over adapter board for Xilinx FPGA boards Download manual	Purchase
AB18-PCIeX16	PCIe x16 Lanes Crossover adapter board for NVMe-IP evaluation Download manual	Purchase

About price and licence of this IP core, please contact Design Gateway.

Application example

Multiple user (host) sharing single SSD system
Data Stream Application (Video recording Start-Stop operation)