本文へスキップ

The Expert of IP Core & Embedded


muNVMe IPMultiple data stream access to NVMe SSD simultaneously without CPU!

FeaturesBlock diagramDocument Download
muNVMe-IP

muNVMe-IP (Multi User NVMe IP) is designed and optimized for multiple data stream access to single NVMe SSD by multiple users simultaneously. muNVMe-IP can achieve close to SSD's maximum possible throughput for both mixed read/write and same direction access. This IP is recommended for the application that requires high performance & multiple data streaming or sequential access over single NVMe SSD by pure hardware logic without CPU/OS. Customization to increase the number of users is possible upon customer's requirements.

Features

  • NVMe host controller for access one NVMe SSD without CPU and external memory
  • Support two users to access one SSD simultaneously
  • Simple user interfaces by dgIF typeS
  • Include two 256-Kbyte RAMs for two users
  • Command support:
    • User#0 (Main user): Identify, Shutdown, Write, Read, SMART, and Flush
    • User#1 (Sub user): Write and Read
  • Supported NVMe device
    • Base Class Code:01h (mass storage), Sub Class Code:08h (Non-volatile), Programming Interface:02h (NVMHCI)
    • MPSMIN: 0 (4KB)
    • MDTS: At least 5 (128 KB) or 0 (no limitation)
    • LBA unit: 512 bytes or 4096 bytes
    • Support multiple queues
  • User clock frequency must be more than or equal to PCIe clock (250MHz for Gen3)
  • Operating with Integrated Block for PCI Express from Xilinx by using 4-lane PCIe Gen3 (128-bit bus interface)
  • One muNVMe IP connects to one NVMe SSD directly
  • Available reference design:
    • Two-user demo on KCU116 and ZCU106
    • 2-ch RAID0 demo on ZCU106
  • Customized service for following features
    • Additional NVMe commands
    • Increase user channel

Block diagram




Document download

Please receive technical document update from DG News Letter. Subscribe to DG News

Technical Documents

Support Devices Zynq UltraScale+, Kintex UltraScale+
IP core Datasheet Reference Design Document Demo Instruction Document FPGA Board Setup Evaluation demo file * ask password
Demo Video
muNVMe-IP Rev1.0 Rev1.0 Rev1.0 Rev4.4 ZCU106
KCU116
2ch RAID0 Rev1.0 Rev1.0 ZCU106


Accessories for evaluation

Accessories for evaluation Description
AB18-PCIeX16 PCIe x16 Lanes Crossover adapter board for NVMe-IP evaluation
Download manual

Purchase

About price and licence of this IP core, please contact Design Gateway.



Alliance Partner


Design Gateway Co., Ltd.

Head Office
3-23-17 Naka-cho, Koganei, Tokyo, JAPAN
R&D
89/13 Amornpan 205 Tower1, 11th floor, Ratchadapisek7 (Nathong) Alley, Ratchadapisek Road, Din Daeng, Bangkok, 10400 THAILAND