|Design Gateway Co., Ltd. is Xilinx Alliance Program Member, provider of Storage and Networking IP Cores. We provide high performance
and low resources usage solutions with comprehensive reference design and
demo ready for real board evaluation to support customers.
Gigabit IP core BrochureIP cores Brochure (English)
IP核 Brochure (中文)
Vivado IP CatalogXML download (2021.12)┃How to add DG IP catalog in Vivado
IP Philosophy & Advantage
|No CPU/DDR required
|No PCIe Hard IP required||>500K IOPS random write access||Multi user simultaneously access||Random Access By Multiple Users|
|Learn More about NVMe-IP||Learn More about NVMeG4-IP||Learn More about raNVMe-IP||Learn More about muNVMe-IP||Learn More about muNVMe-IP|
NVMe IP core is standalone NVMe Host Controller with built-in optimized PCIe Bridge
and Internal Memory Buffer, designed to handle NVMe Protocol without CPU/OS
and External DDR memory. It’s recommended for the application which requires
high performance, high storage capacity, very compact system size and easily
to support multiple NVMe SSDs. Learn More about NVMe-IP
NVMeG4/G3 IP including PCIe Gen4/Gen3 Soft IP inside is highly integrated, standalone NVMe Host Controller with built-in PCIe Gen4 root complex IP core for Xilinx’s high end UltraScale+ device. Enabling NVMe PCIe Gen4 SSD storage solutions with no CPU/OS required. Achieving 200% performance improvement with just +30% FPGA resources usage. Break the barriers of NVMe SSD interface, Allow to build multi-channel RAID system with very high performance and lowest possible FPGA resources consumption.
raNVMe-IP (Random Access) is the new generation of NVMe-IP series which is intentionally optimized for random access and low latency time. raNVMe-IP can achieve more than 500K IOPS for random write access on high performance NVMe SSD without CPU intervention. Ideal for the application which requires multiple access to NVMe SSD with best performance.
muNVMe-IP (Multi User) is pure hardware logic solutions for very high throughput, multiple data streaming access to NVMe SSD simultaneously without CPU. Simplify your system complexity and maximize performance.
rmNVMe-IP (Random Access & Multi User)is very high performance NVMe Host Controller which is highly optimized for high-IOPS random access applications. rmNVMe-IP supports multiple user interfaces, each user can simultaneously read/write to a single NVMe SSD at the same time.
SATA IP with Host IP core is standalone SATA Host Controller designed to handle SATA Protocol and
communicate with SATA 3.0 compliant device without CPU/OS and External
DDR memory. SATA storage is suitable for low cost and large storage capacity
with easily scalable SATA Channel to support RAID system. Learn More about SATA IP core
100G/40G/25G/10G/1Gbit TCP Off-loading Engine IP core is the pure hardware logic solution, TCP/IP protocol is handled 100% by
IP core. Enabling TCP network communication to FPGA system without need
CPU/OS or external memory. We provides both TCP offload engine IP for different
Ethernet speed up to 100Gbps. Learn More about TOE IP core series
UDP 100G/40G/25G/10G/1G Off-loading Engine IP core is the epochal solution implemented by hardware logic only without CPU. Learn More about UDP IP core series
NVMeTCP IP is the standalone host side NVMe Over Fabric (NVMe/TCP) controller with no CPU and external memory required. Enabling very high-performance remote access to NVMe-oF Storage Server by simple user logic. Greatly reduce design complexity and development time. Allowing your FPGA Card/Board to get access to the existing NVMe-oF storage infrastructure remotely and directly over FPGA’s network interface with maximum possible performance. Learn more about NVMeTCP-IP
Together with Design Gateway's data storage and networking IP, Security IP cores enable more opportunity for inventing the secure, efficient and high performance applications.
|SHA-256 IP is an optimized and efficient implementation of a secure hash algorithm
SHA-256 specified in FIPS 180-4 standard. SHA256-IP can process 512-bit
data blocks in just 65 clock cycles. Delivering 7.875Mbps throughput per 1MHz clock such as 2.362 Gbps throughput @ 300MHz. * tentative
Learn more about SHA-256 IP
|AES-128 IP is 1st member of Advanced Encryption Standard (FIPS-197) IP Series, designed
to support ECB mode for both encryption and decryption. AES128-IP computes
128-bit data blocks within constant 11 clock cycles. Delivering 11.6Mbps throughput per 1MHz such as 2.9 Gbps @ 250MHz.(AES-256 IP : 15 clock cycles)
Learn more about AES-128/256 IP
High throughput AES GCM IP Core for secure communication applications.AES256-GCM-10G25G/1G IP core implement the advanced encryption standard (AES) with 256-bit key in Galois/Counter Mode (GCM) which is widely used for Authenticated Encryption with Associated Data (AEAD) application. This IP core can achieve high throughput 19.2Gbps @300MHz, suitable to work together with Low Latency TOE10G IP core for high performance, low latency and secure communication applications.
Learn more about AES256-GCM-10G25G/1G IP
High throughput AES XTS IP Core for secure storage applications.AES256-XTS IP Core (AES256XTSIP) implement the advanced encryption standard (AES) with XEX Tweakable Block Cipher with Ciphertext Stealing (XTS) which is widely used in protecting the confidentiality of data on storage devices.
Learn more about AES256-XTS IP
USB3.0 IP core compliant with the USB 3.0 specification Revision1.0. This IP
core provide link layer and protocol layer. We release both Host and Device
side of IP core. More detail
SDXC IP core compliant with SD Specifications Version 3.01 and support both
High-speed SD card (Class6), SDHC card and SDXC card. It supports SDR50
mode and achieves High-speed transmission up to 50MB/s (About supporting
SDR104 mode, please ask). More detail
AB Series is Extension Adapter Boards for IP core evaluation. AB Series support Xilinx FPGA boards. AB Series page